LTC2414 LINER [Linear Technology], LTC2414 Datasheet - Page 17

• Manufacturer Part Number: LTC2414
• Description: 8-/16-Channel 24-Bit No Latency TM ADCs
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2414/
LTC2418 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
oscillator. The frequency f
be at least 2560Hz (1Hz notch frequency) to be detected.
The external clock signal duty cycle is not significant as
long as the minimum and maximum specifications for the
high and low periods t
While operating with an external conversion clock of a
frequency f
normal mode rejection in a frequency range f
±4% and its harmonics. The normal mode rejection as a
function of the input frequency deviation from f
is shown in Figure 4.
Whenever an external clock is not present at the F
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The converter
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
outside specifications but the following conversions will
not be affected. If the change occurs during the data output
state and the converter is in the Internal SCK mode, the
Table 4. LTC2414/LTC2418 Output Data Format
Differential Input Voltage
V
V
0.5 • V
0.25 • V
0.25 • V
0
–1LSB
– 0.25 • V
– 0.25 • V
– 0.5 • V
V
*The differential input voltage V
**The differential reference voltage V
IN
IN
IN
* ≥ 0.5 • V
* < –0.5 • V
*
EOSC
REF
REF
REF
REF
, the converter provides better than 110dB
REF
REF
** – 1LSB
**
** – 1LSB
**
**
** – 1LSB
REF
U
REF
**
**
HEO
U
EOSC
and t
O
pin and turns off the internal
of the external signal must
LEO
IN
= IN
W
Bit 31
are observed.
EOC
REF
0
0
0
0
0
0
0
0
0
0
+
– IN
= REF
–
.
+
Bit 30
DMY
– REF
0
0
0
0
0
0
0
0
0
0
U
EOSC
EOSC
O
pin, the
–
.
/2560
/2560
Bit 29
SIG
1
1
1
1
1
0
0
0
0
0
Bit 28
MSB
serial clock duty cycle may be affected but the serial data
stream will remain valid.
Table 5 summarizes the duration of each state and the
achievable output data rate as a function of F
SERIAL INTERFACE PINS
The LTC2414/LTC2418 transmit the conversion results
and receive the start of conversion command through a
synchronous 4-wire interface. During the conversion and
sleep states, this interface can be used to assess the con-
verter status and during the data I/O state it is used to read
the conversion result and write in channel selection bits.
1
0
0
0
0
1
1
1
1
0
Figure 4. LTC2414/LTC2418 Normal Mode Rejection
When Using an External Oscillator of Frequency f
Bit 27
0
1
1
0
0
1
1
0
0
1
–100
–105
–110
–115
–120
–125
–130
–135
–140
–80
–85
–90
–95
DEVIATION FROM NOTCH FREQUENCY f
–12
DIFFERENTIAL INPUT SIGNAL FREQUENCY
Bit 26
–8
0
1
0
1
0
1
0
1
0
1
LTC2414/LTC2418
–4
Bit 25
0
1
0
1
0
1
0
1
0
1
0
4
…
…
…
…
…
…
…
…
…
…
…
EOSC
8
241418 F04
/2560(%)
Bit 6
LSB
12
0
1
0
1
0
1
0
1
0
1
O
.
EOSC
17
241418fa