LTC2414 LINER [Linear Technology], LTC2414 Datasheet - Page 28

• Manufacturer Part Number: LTC2414
• Description: 8-/16-Channel 24-Bit No Latency TM ADCs
• Manufacturer: LINER [Linear Technology]

Figure 17. Offset Error vs Common Mode Voltage
(V
(∆R
LTC2414/LTC2418
APPLICATIO S I FOR ATIO
28
INCM
IN
Figure 16. –FS Error vs R
Figure 15. +FS Error vs R
= R
= IN
SOURCEIN
+
–120
–180
–240
–300
–100
–120
= IN
–60
120
100
–20
–40
–60
–80
300
240
180
120
80
60
40
20
60
0
0
0
0 100 200 300 400 500 600 700 800 900 1000
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
0 100 200 300 400 500 600 700 800 900 1000
–
A: ∆R
B: ∆R
C: ∆R
D: ∆R
) and Input Source Resistance Imbalance
+ – R
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
O
A
A
CC
CC
+
–
+
–
= GND
= 25°C
= GND
= 25°C
IN
IN
IN
A
B
C
D
E
F
G
IN
+
= 1.25V
= 3.75V
+
–
= 3.75V
= 1.25V
= 5V
–
= 5V
U
= +400Ω
= +200Ω
= +100Ω
SOURCEIN
= 5V
= 5V
= GND
= 0Ω
= GND
V
REF
REF
IN
CC
F
T
R
C
R
+
O
A
R
IN
SOURCE
SOURCE
SOURCEIN
U
SOURCE
+
V
SOURCE
–
= IN
= GND
= 25°C
= 5V
= 10µF
INCM
= 5V
–) for Large C
= GND
–
C
C
= V
C
(V)
IN
IN
IN
(Ω)
(Ω)
– = 500Ω
at IN
at IN
INCM
= 1µF, 10µF
= 0.01µF
= 1µF, 10µF
C
E: ∆R
F: ∆R
G: ∆R
C
C
IN
IN
IN
W
= 0.01µF
+
= 0.1µF
+
= 0.1µF
IN
IN
IN
or IN
or IN
= –200Ω
= –100Ω
= –400Ω
IN
2414/18 F17
2414/18 F16
2414/18 F15
Values (C
–
–
(Large C
(Large C
U
IN
IN
IN
≥ 1µF)
)
)
1.78 • 10
error due to input common mode voltage for various
values of source resistance imbalance between the IN
and IN
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
eliminates the offset error caused by mismatched source
impedances.
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typical better than 0.5%. Such
a specification can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/°C) are
used for the external source impedance seen by IN
IN
gain errors will be insignificant (about 1% of their respec-
tive values over the entire temperature and voltage range).
Even for the most stringent applications, a one-time
calibration operation may be sufficient.
In addition to the input sampling charge, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA max), results
in a small offset shift. A 100Ω source resistance will create
a 0.1µV typical and 1µV maximum offset voltage.
Reference Current
In a similar fashion, the LTC2414/LTC2418 samples the
differential reference pins REF
small amount of charge to and from the external driving
circuits thus producing a dynamic reference current. This
current does not change the converter offset, but it may
degrade the gain and INL performance. The effect of this
current can be analyzed in the same two distinct situa-
tions.
For relatively small values of the external reference capaci-
tors (C
settles almost completely and relatively large values for
the source impedance result in only small errors. Such
–
, the expected drift of the dynamic current, offset and
–
REF
pins when large C
–6
< 0.01µF), the voltage on the sampling capacitor
• f
EOSC
ppm. Figure 17 shows the typical offset
IN
values are used.
+
and REF
–
transferring
241418fa
+
and
+