MC68HC11E0 Motorola, MC68HC11E0 Datasheet - Page 41

• Manufacturer Part Number: MC68HC11E0
• Description: (MC68HC711E Series) M68HC11E Series Programming Reference Guide
• Manufacturer: Motorola

Port A Data Register (PORTA)
Port B Data Register (PORTB)
MOTOROLA
Simple
strobed
mode
Full-input
hand-
shake
mode
Full-
output
hand-
shake
mode
Read PIOC
with STAF = 1
then read
PORTCL
Read
PIOC with
STAF = 1 then
read PORTCL
Read
PIOC with
STAF = 1 then
write PORTCL
Sequence
Clearing
NOTE:
STAF
Single Chip or Boot:
Expanded or Test:
Alt. Pin Function:
HNDS OIN
Address: $1000
I/O pins configured as high-impedance inputs have port data that is
indeterminate. The contents of the corresponding latches are dependent upon
the electrical state of the pins during reset. This is indicated by an “I” in the port
description.
Address: $1004
0
1
1
And/OR
Reset:
Reset:
Read:
Write:
Read:
Write:
M68HC11E Series Programming Reference Guide
X
0
1
ADDR15
Bit 7
OC1
Bit 7
PA7
PB7
PB7
0 = STRB
1 = STRB
0 = STRB
1 = STRB
PAI
0
I
active level
active pulse
active level
active pulse
PLS
X
ADDR14
OC2
OC1
PB6
PB6
PA6
6
0
6
0
Follow
DDRC
ADDR13
0
1
1
0
0
1
OC3
OC1
PB5
PB5
PA5
5
0
5
0
Active Edge
Port C
Driven
EGA
STRA
ADDR12
OC4
OC1
PA4
PB4
PB4
4
0
4
0
Follow
DDRC
OC5/IC4
ADDR11
OC1
Inputs latched into
PORTCL on any
active edge on
STRA
Inputs latched into
PORTCL on any
active edge on
STRA
Driven as outputs if
STRA at active level;
follows DDRC if
STRA not at active
level
PB3
PB3
PA3
3
3
0
I
Port B
ADDR10
PB2
PB2
PA2
IC1
—
2
2
0
I
M68HC11E Series Registers
ADDR9
PA1
PB2
PB1
STRB pulses
on writes
to PORTB
Normal output
port, unaffected
in handshake
modes
Normal output
port, unaffected
in handshake
modes
IC2
—
M68HC11ERG/AD
1
1
0
I
Port C
ADDR8
Bit 0
Bit 0
PB0
PB0
PA0
IC3
—
0
I
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