DAC1008D750HN NXP [NXP Semiconductors], DAC1008D750HN Datasheet - Page 83

• Manufacturer Part Number: DAC1008D750HN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 169. LN1_CFG_11 register (address 1Bh) bit description
Default settings are shown highlighted.
Table 170. LN1_CFG_12 register (address 1Ch) bit description
Default settings are shown highlighted.
Table 171. LN1_CFG_13 register (address 1Dh) bit description
Default settings are shown highlighted.
Table 172. PAGE_ADDRESS register (address 1Fh) bit description
Default settings are shown highlighted.
DAC1008D750
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
2 to 0
Symbol
LN1_RES1[7:0]
Symbol
LN1_RES2[7:0]
Symbol
LN1_FCHK[7:0]
Symbol
PAGE[2:0]
All information provided in this document is subject to legal disclaimers.
Access
R
Access
R
Access
R
Access
R/W
Rev. 2 — 5 January 2011
Value
-
Value
-
Value
Value
0h
-
2×, 4× or 8× interpolating DAC with JESD204A
Description
lane 1 reserved field
Description
lane 1 reserved field
Description
Description
page_address
lane 1 checksum
DAC1008D750
© NXP B.V. 2011. All rights reserved.
83 of 99