ADSP-21266_07 AD [Analog Devices], ADSP-21266_07 Datasheet - Page 9

• Manufacturer Part Number: ADSP-21266_07
• Description: Embedded Processor
• Manufacturer: AD [Analog Devices]

filter circuit for the A
close as possible to the A
see
BLM18AG102SN1D). To reduce noise coupling, the PCB
should use a parallel pair of power and ground planes for V
and GND. Use wide traces to connect the bypass capacitors to
the analog power (A
A
cessor and not the analog ground plane on the board—the A
pin should connect directly to digital ground (GND) at the chip.
TARGET BOARD JTAG EMULATOR CONNECTOR
Analog Devices DSP Tools product line of JTAG emulators uses
the IEEE 1149.1 JTAG test access port of the ADSP-21266 pro-
cessor to monitor and control the target board processor during
emulation. Analog Devices DSP Tools product line of JTAG
emulators provides emulation at full processor speed, allowing
inspection and modification of memory, registers, and proces-
sor stacks. The processor’s JTAG interface ensures that the
emulator will not affect target system loading or timing.
For complete information on Analog Devices SHARC DSP
Tools product line of JTAG emulator operation, see the appro-
priate emulator hardware user’s guide.
DEVELOPMENT TOOLS
The ADSP-21266 is supported by a complete automotive refer-
ence design and development board as well as by a complete
home audio reference design board available from Analog
Devices. These boards implement complete audio decoding and
postprocessing algorithms that are factory programmed into the
ROM space of the ADSP-21266. SIMD optimized libraries con-
sume less processing resources, which results in more available
processing power for custom proprietary features.
The nonvolatile memory of the ADSP-21266 can be configured
to contain a combination of Dolby Digital, Dolby Pro Logic,
Dolby Pro Logic II, Dolby Pro Logic IIx, DTSES, DTS 96/24,
and Neo:6. Multiple S/PDIF and analog I/Os are provided to
maximize end system flexibility.
VDD
V DDINT
Figure
and A
HI Z FERRITE
4. (A recommended ferrite chip is the muRata
BEAD CHIP
VSS
pins specified in
Figure 4. Analog Power Filter Circuit
CLOSE TO A VDD AND A VSS PINS
VDD
100nF
LOCATE ALL COMPONENTS
VDD
) and ground (A
VDD
pin. Place the filter components as
/A
10nF
VSS
Figure 4
pins. For an example circuit,
1nF
VSS
are inputs to the pro-
) pins. Note that the
ADSP-212xx
A VDD
A VSS
Rev. C | Page 9 of 44 | October 2007
DDINT
VSS
The ADSP-21266 is also supported with a complete set of
CROSSCORE
including Analog Devices emulators and VisualDSP++
development environment. The same emulator hardware that
supports other SHARC processors also fully emulates the
ADSP-21266.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an alge-
braic syntax), an archiver (librarian/library builder), a linker, a
loader, a cycle-accurate instruction-level simulator, a C/C++
compiler, and a C/C++ runtime library that includes DSP and
mathematical functions. A key point for these tools is C/C++
code efficiency. The compiler has been developed for efficient
translation of C/C++ code to DSP assembly. The ADSP-21266
SHARC DSP has architectural features that improve the
efficiency of compiled C/C++ code.
The VisualDSP++ debugger has a number of important fea-
tures. Data visualization is enhanced by a plotting package that
offers a significant level of flexibility. This graphical representa-
tion of user data enables the programmer to quickly determine
the performance of an algorithm. As algorithms grow in com-
plexity, this capability can have increasing significance on the
designer’s development schedule, increasing productivity. Sta-
tistical profiling enables the programmer to nonintrusively poll
the processor as it is running the program. This feature, unique
to VisualDSP++, enables the software developer to passively
gather important code execution metrics without interrupting
the real-time characteristics of the program. Essentially, the
developer can identify bottlenecks in software quickly and effi-
ciently. By using the profiler, the programmer can focus on
those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
†
‡
CROSSCORE is a registered trademark of Analog Devices, Inc.
VisualDSP++ is a registered trademark of Analog Devices, Inc.
• View mixed C/C++ and assembly code (interleaved source
• Insert breakpoints
• Set conditional breakpoints on registers, memory,
• Perform linear or statistical profiling of program execution
• Fill, dump, and graphically plot the contents of memory
• Perform source level debugging
• Create custom debugger windows
and object information)
and stacks
®†
software and hardware development tools,
ADSP-21266
®‡