AT94S10AL ATMEL [ATMEL Corporation], AT94S10AL Datasheet - Page 10

• Manufacturer Part Number: AT94S10AL
• Description: Secure 5K - 40K Gates of AT40K FPGA with 8-bit Microcontroller,up to 36 Kbytes of SRAM and On-chip Program Storage EEPROM
• Manufacturer: ATMEL [ATMEL Corporation]

Reading
10
AT94S Secure Family
Read instructions are initiated similarly to write instructions. However, with the R/W bit in
the Device Address set to one. There are three variants of the read instruction: current
address read, random read and sequential read.
For all reads, it is important to understand that the internal Data Byte address counter
maintains the last address accessed during the previous read or write operation, incre-
mented by one. This address remains valid between operations as long as the chip
power is maintained and the device remains in 2-wire access mode (i.e., SER_EN is
driven Low). If the last operation was a read at address n, then the current address
would be n + 1. If the final operation was a write at address n, then the current address
would again be n + 1 with one exception. If address n was the last byte address in the
page, the incremented address n + 1 would “roll over” to the first byte address on the
next page.
CURRENT ADDRESS READ: Once the Device Address (with the R/W select bit set to
High) is clocked in and acknowledged by the Configurator, the Data Byte at the current
address is serially clocked out by the Configurator in response to the clock from the pro-
grammer. The programmer generates a Stop Condition to accept the single byte of data
and terminate the read instruction.
RANDOM READ: A Random Read is a Current Address Read preceded by an aborted
write instruction. The write instruction is only initiated for the purpose of loading the
EEPROM Address Bytes. Once the Device Address Byte and the EEPROM Address
Bytes are clocked in and acknowledged by the Configurator, the programmer immedi-
ately initiates a Current Address Read.
A Random Address Read instruction consists of :
A Current Address Read instruction consists of
a Start Condition
a Device Address with R/W = 0
MS Byte of the EEPROM Address
Next Byte of the EEPROM Address
LS Byte of EEPROM Address
a Start Condition
a Device Address with R/W = 1
a Data Byte from the Configurator
a Stop Condition from the programmer.
a Start Condition
a Device Address with R/W = 1
a Data Byte from the Configurator
a Stop Condition from the programmer.
An Acknowledge Bit from the Configurator
An Acknowledge Bit from the Configurator
An Acknowledge Bit from the Configurator
An Acknowledge bit from the Configurator
An Acknowledge Bit from the Configurator
An Acknowledge Bit from the Configurator
2314D–FPSLI–2/04