MPC8358E_11 FREESCALE [Freescale Semiconductor, Inc], MPC8358E_11 Datasheet - Page 13

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MPC8358E_11

Manufacturer Part Number
MPC8358E_11
Description
PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Table 5
4
This section provides the clock input DC and AC electrical characteristics for the MPC8358E.
Freescale Semiconductor
DDR I/O
65% utilization
2.5 V
R
R
2 pairs of clocks
Local Bus I/O
Load = 25 pf
3 pairs of clocks
PCI I/O
Load = 30 pF
10/100/1000
Ethernet I/O
Load = 20 pF
Other I/O
s
t
= 50 Ω
= 20 Ω
Interface
Clock Input Timing
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
shows the estimated typical I/O power dissipation for the device.
The rise/fall time on QUICC Engine block input pins should not exceed 5
ns. This should be enforced especially on clock signals. Rise time refers to
signal transitions from 10% to 90% of V
from 90% to 10% of V
200 MHz, 1x32 bits
200 MHz, 1x64 bits
200 MHz, 2x32 bits
266 MHz, 1x32 bits
266 MHz, 1x64 bits
266 MHz, 2x32 bits
133 MHz, 32 bits
83 MHz, 32 bits
66 MHz, 32 bits
50 MHz, 32 bits
33 MHz, 32 bits
66 MHz, 32 bits
MII or RMII
GMII or TBI
RGMII or RTBI
Parameter
Table 5. Estimated Typical I/O Power Dissipation
DD
(1.8 V)
GV
0.35
0.46
0.3
0.4
0.6
0.7
.
DD
(2.5 V)
GV
NOTE
0.46
0.58
0.92
0.56
1.11
0.7
DD
DD
(3.3 V)
OV
0.22
0.14
0.12
0.09
0.05
0.07
; fall time refers to transitions
0.1
DD
(3.3 V)
LV
0.01
0.04
DD
(2.5 V)
LV
0.04
DD
Unit
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Multiply by
number of
interfaces used.
Clock Input Timing
Comments
13

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