MC68HC11A1 MOTOROLA [Motorola, Inc], MC68HC11A1 Datasheet - Page 30

• Manufacturer Part Number: MC68HC11A1
• Description: 8-Bit Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

DDD[5:0] — Data Direction for Port D
SPCR — Serial Peripheral Control Register
SPIE — Serial Peripheral Interrupt Enable
SPE — Serial Peripheral System Enable
DWOM — Port D Wired-OR Mode
MSTR — Master Mode Select
CPOL, CPHA — Clock Polarity, Clock Phase
30
MOTOROLA
RESET:
(CPHA = 0)
(CPHA = 1)
When DDRD bit 5 is zero and MSTR = 1 in SPCR, PD5/SS is a general-purpose output and mode fault
logic is disabled.
DWOM affects all six port D pins.
Refer to Figure 10
1. SS ASSERTED
2. MASTER WRITES TO SPDR
3. FIRST SCK EDGE
4. SPIF SET
5. SS NEGATED
SAMPLE INPUT
SAMPLE INPUT
0 = Input
1 = Output
0 = SPI interrupts disabled
1 = SPI interrupts enabled
0 = SPI off
1 = SPI on
0 = Normal CMOS outputs
1 = Open-drain outputs
0 = Slave mode
1 = Master mode
SCK (CPOL = 0)
SCK (CPOL = 1)
SS (TO SLAVE)
SCK CYCLE #
DATA OUT
DATA OUT
SPIE
Bit 7
0
SPE
6
0
1
2
MSB
3
DWOM
5
0
MSB
1
Figure 10 SPI Transfer Format
6
MSTR
2
4
0
6
SLAVE CPHA=1 TRANSFER IN PROGRESS
SLAVE CPHA=0 TRANSFER IN PROGRESS
5
MASTER TRANSFER IN PROGRESS
CPOL
3
5
3
0
4
4
4
CPHA
2
1
3
5
3
SPR1
2
U
1
6
2
$1028
1
SPR0
Bit 0
U
7
1
LSB
MC68HC11A8TS/D
8
MC68HC11A8
LSB
SPI TRANSFER FORMAT 1
4
5