PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 255

• Manufacturer Part Number: PEB2256E
• Description: E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

System Interface Control 2 (Read/Write)
Value after reset: 00
SIC2
FFS
SSF
CRB
SICS(2:0)
Data Sheet
FFS
7
Force Freeze Signaling
Setting this bit disables updating of the receive signaling buffer and
current signaling information is frozen. After resetting this bit and
receiving a complete superframe updating of the signaling buffer is
started again. The freeze signaling status can also be automatically
generated by detecting the loss-of-signal alarm or a loss of CAS
frame alignment or a receive slip (only if external register access on
pin RSIG is enabled). This automatic freeze signaling function is
logically ored with this bit.
The current internal freeze signaling status is output on pin RPA to
RPD
PC(4:1).RPC(2:0) = 110. Additionally, this status is also available in
register SIS.SFS.
Serial Signaling Format
Only applicable if pin function RSIG/XSIG and SIC3.TTRF = 0 is
selected.
0 =
1 =
Center Receive Elastic Buffer
Only
(PC(4:1).RPC(2:0) = 001
receive is generated.
A transition from low to high forces a receive slip and the read- pointer
of the receive elastic buffer is centered. The delay through the buffer
is set to one half of the current buffer size. It should be hold high for
at least two 2.048 MHz periods before it is cleared.
System Interface Channel Select
Only applicable if the system clock rate is greater than 2.048 MHz.
Received data is transmitted on pin RDO/RSIG or received on XDI/
XSIG with the selected system data rate. If the data rate is greater
than 2.048 Mbit/s the data is output or sampled in half, a quarter or
SSF
H
Bits 1 to 4 in all time slots except time slots 0 and16 are cleared.
Bits 1 to 4 in all time slots except time slots 0 and16 are set
high.
using
applicable
CRB
pin
if
function
255
the
B
), no external or internal synchronous pulse
SICS2
time
FREEZE
SICS1
slot
which
SICS0
assigner
is
FALC56 V1.2
E1 Registers
0
selected
is
PEB 2256
2002-08-27
disabled
(3F)
by