PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 404

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PEB2256E

Manufacturer Part Number
PEB2256E
Description
E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
Time Slot Bit Select 2 (Read/Write)
Value after reset: FF
TSBS2
TSB2(7:0)
Time Slot Bit Select 3 (Read/Write)
Value after reset: FF
TSBS3
TSB3(7:0)
Data Sheet
TSB27
TSB37
7
7
TSB26
TSB36
TSB1x = 1 to bit position x in selected time slot(s) is used for HDLC
channel 1 reception and transmission.
Time Slot Bit Selection - HDLC Channel 2
Only bits selected by this register are used for HDLC channel 2 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS2. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
TSB2x=0 to bit position x in selected time slot(s) is not used for
HDLC channel 2 reception and transmission.
TSB2x=1 to bit position x in selected time slot(s) is used for HDLC
channel 2 reception and transmission.
Time Slot Bit Selection - HDLC Channel 3
Only bits selected by this register are used for HDLC channel 3 in
selected time slots. Time slot selection is done by setting the
appropriate bits in register TSS3. Bit selection is common to receive
and transmit direction. By default all bit positions within the selected
time slot are enabled.
TSB3x=0 to bit position x in selected time slot(s) is not used for
HDLC channel 3 reception and transmission.
TSB3x=1 to bit position x in selected time slot(s) is used for HDLC
channel 3 reception and transmission.
H
H
TSB25
TSB35
TSB24
TSB34
404
TSB23
TSB33
TSB22
TSB32
TSB21
TSB31
T1/J1 Registers
TSB20
TSB30
FALC56 V1.2
0
0
PEB 2256
2002-08-27
(A2)
A3)

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