ISL6334D_09 INTERSIL [Intersil Corporation], ISL6334D_09 Datasheet

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ISL6334D_09

Manufacturer Part Number
ISL6334D_09
Description
VR11.1, 4-Phase PWM Controller with Phase Dropping, Droop Disabled and Load Current Monitoring Features
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
VR11.1, 4-Phase PWM Controller with
Phase Dropping, Droop Disabled and
Load Current Monitoring Features
The ISL6334D controls voltage regulator by driving up to 4
interleaved synchronous-rectified buck channels in parallel.
This multiphase architecture results in multiplying channel
ripple frequency and reducing input and output ripple currents.
Lower ripple results in fewer components, lower cost, reduced
power dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and requires high efficiency at light
load. The ISL6334D utilizes Intersil’s proprietary Active
Pulse Positioning (APP), Adaptive Phase Alignment (APA)
modulation scheme, active phase adding and dropping to
achieve and maintain the extremely fast transient response
with fewer output capacitors and high efficiency from light to
full load.
The ISL6334D is designed to be completely compliant with
Intel VR11.1 specifications. It accurately reports the load
current via IMON pin to the microprocessor, which sends an
active low PSI# signal to the controller at low power mode.
The controller then enters 1- or 2-phase operation with diode
emulation option to reduce magnetic core and switching
losses, yielding high efficiency at light load. After the PSI#
signal is de-asserted, the dropped phase(s) are added back
to sustain heavy load transient response and efficiency.
The ISL6334D senses the output current continuously by
utilizing patented techniques to measure the voltage across the
dedicated current sense resistor or the DCR of the output
inductor. Current sensing circuits also provide the needed
signals for channel-current balancing, average overcurrent
protection and individual phase current limiting. An NTC
thermistor’s temperature is sensed via the TM pin and internally
digitized for thermal monitoring and for integrated thermal
compensation of the current sense elements.
A unity gain, differential amplifier is provided for remote voltage
sensing and completely eliminates any potential difference
between remote and local grounds. This improves regulation
and protection accuracy. The threshold-sensitive enable input is
available to accurately coordinate the start-up of the ISL6334D
with any other voltage rail. Dynamic-VID™ technology allows
seamless on-the-fly VID changes. The offset pin allows
accurate voltage offset settings that are independent of VID
setting.
®
1
Data Sheet
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Intel VR11.1 Compliant with Droop Disabled
• Proprietary Active Pulse Positioning (APP) and Adaptive
• Proprietary Active Phase Adding and Dropping For High
• Precision Multiphase Core Voltage Regulation
• Precision Resistor or DCR Differential Current Sensing
• Microprocessor Voltage Identification Input
• Average Overcurrent Protection and Channel Current Limit
• Precision Overcurrent Protection on IMON Pin
• Thermal Monitoring and Overvoltage Protection
• Integrated Programmable Temperature Compensation
• Integrated Open Sense Line Protection
• 1- to 4-Phase Operation, Coupled Inductor Compatibility
• Adjustable Switching Frequency up to 1MHz Per Phase
• Package Option
• Pb-Free (RoHS Compliant)
Phase Alignment (APA) Modulation Scheme
Light Load Efficiency
- Differential Remote Voltage Sensing
- ±0.5% Closed-loop System Accuracy Over Load, Line
- Bi-directional, Adjustable Reference-Voltage Offset
- Accurate Channel-Current Balancing
- Accurate Load Current Monitoring via IMON Pin
- Dynamic VID™ Technology for VR11.1 Requirement
- 8-Bit VID, VR11 Compatible
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
and Temperature
Flat No Leads - Product Outline
All other trademarks mentioned are the property of their respective owners.
May 28, 2009
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved
ISL6334D
FN6802.1

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ISL6334D_09 Summary of contents

Page 1

Data Sheet VR11.1, 4-Phase PWM Controller with Phase Dropping, Droop Disabled and Load Current Monitoring Features The ISL6334D controls voltage regulator by driving interleaved synchronous-rectified buck channels in parallel. This multiphase architecture results in multiplying channel ...

Page 2

Ordering Information PART NUMBER (Note) ISL6334DIRZ* 6334D IRZ ISL6334DCRZ* 6334D CRZ *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding ...

Page 3

ISL6334D Block Diagram VDIFF RGND - X1 + VSEN SOFT-START + OVP - FAULT LOGIC +175mV SS VID7 VID6 VID5 DYNAMIC VID4 VID VID3 D/A VID2 VID1 VID0 DAC OFS OFFSET REF FB COMP 1.11V + OCP - IMON 1.11V ...

Page 4

Typical Application: 4-Phase VR with PSI# and No Droop +5V COMP VCC DAC FB VDIFF VSEN PWM1 RGND ISEN1- EN_VTT VTT ISEN1+ VR_RDY VID7 ISL6334D ISL6334 VID6 VID5 VID4 PWM2 VID3 VID2 ISEN2- VID1 ISEN2+ VID0 PSI# VR_FAN PWM3 ISEN3- ...

Page 5

Typical Application - 4-Phase Couple Inductor VR with 2-Phase PSI# and No Droop +5V COMP VCC FB VDIFF VSEN RGND ISEN1+ EN_VTT VTT ISEN1- VR_RDY VID7 VID6 ISL6334D ISL6334 VID5 VID4 VID3 VID2 ISEN3- VID1 ISEN3+ VID0 ISEN2+ PSI# VR_FAN ...

Page 6

Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+6V ...

Page 7

Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER PIN-ADJUSTABLE OFFSET Voltage at ...

Page 8

Electrical Specifications Operating Conditions: VCC = 5V, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER THERMAL MONITORING AND FAN ...

Page 9

Functional Pin Description VCC - Supplies the power necessary to operate the chip. The controller starts to operate when the voltage on this pin exceeds the rising POR threshold and shuts down when the voltage on this pin drops below ...

Page 10

For DCR sensing, connect each ISEN- pin to the node between the RC sense elements. Tie the ISEN+ pin to the other end of the sense capacitor through a resistor, R The voltage across the sense capacitor is proportional to ...

Page 11

To understand the reduction of ripple current amplitude in the multiphase circuit, examine Equation 1, which represents an individual channel’s peak-to-peak inductor current – IN OUT OUT I = ----------------------------------------------------- - ...

Page 12

When PSI# is asserted low, indicating the low power mode operation of the processor, the controller drops the number of active phases according to the logic on Table 1 for highlight load efficiency performance. SS and FS pins are used ...

Page 13

A simple R-C network across the inductor extracts the DCR voltage, as shown in Figure ISL6596 INDUCTOR R PWM(n) ISL6334D INTERNAL CIRCUIT I n CURRENT SENSE ISEN-( ISEN+(n) DCR I I ------------------- = SEN ...

Page 14

DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6334D to include the combined tolerances of each of these elements. ...

Page 15

TABLE 2. VR11 VID 8-BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...

Page 16

TABLE 2. VR11 VID 8-BIT (Continued) VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE ...

Page 17

FB DYNAMIC VID D/A E 0.4V - GND VCC FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING Once the desired output offset voltage has been determined, use Equations 8 and 9 to calculate R OFS For Positive Offset ...

Page 18

ISL6334D INTERNAL CIRCUIT POR ENABLE COMPARATOR CIRCUIT + - 0.875V + - 0.875V SOFT-START AND FAULT LOGIC FIGURE 8. POWER SEQUENCING USING THRESHOLD SENSITIVE ENABLE (EN) FUNCTION Soft-Start ISL6334D based VR has 4 periods during soft-start, as shown in Figure ...

Page 19

Fault Monitoring and Protection The ISL6334D actively monitors output voltage and current to detect fault conditions. Fault monitors trigger protective measures to prevent damage to a microprocessor load. One common power-good indicator is provided for linking to external system monitors. ...

Page 20

OUTPUT CURRENT 0A OUTPUT VOLTAGE 0V 2ms/DIV FIGURE 11. OVERCURRENT BEHAVIOR IN HICCUP MODE 500kHz ...

Page 21

TM 0.451*Vcc 0.391*Vcc 0.333*Vcc VR_FAN VR_HOT FIGURE 14. VR_HOT AND VR_FAN SIGNAL vs TM VOLTAGE Based on the NTC temperature characteristics and the desired threshold of the VR_HOT signal, the pull-up resistor RTM1 of TM pin is ...

Page 22

ISL6334D multiplexes the TCOMP factor N with the TM digital signal to obtain the adjustment gain to compensate the temperature impact on the sensed channel current. The compensated channel current signal is used for IMON and overcurrent protection functions. Design ...

Page 23

MOSFETs The choice of MOSFETs depends on the current each MOSFET will be required to conduct; the switching frequency; the capability of the MOSFETs to dissipate heat; and the availability and nature of heat sinking and air flow. LOWER MOSFET ...

Page 24

DC resistance of the current sense element may be changed according to the operational temperature Equation 27 should be the maximum DC X resistance of the current sense element at the all operational ...

Page 25

The capacitors selected must have sufficiently low ESL and ESR so that the total output-voltage deviation is less than the allowable maximum. Neglecting the contribution of inductor current and regulator response, the output voltage initially deviates by an amount, ...

Page 26

0.5 I L(P-P) L(P- 0. 0.75 I L(P-P) O L(P-P) 0.2 0 0.2 0.4 0.6 DUTY CYCLE (V O/ FIGURE 20. NORMALIZED INPUT-CAPACITOR RMS CURRENT vs DUTY ...

Page 27

Component Placement Within the allotted implementation area, orient the switching components first. The switching components are the most critical because they carry large amounts of energy and tend to generate high levels of noise. Switching component placement should take into ...

Page 28

Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 28 ...

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