AT25DF641A-MH-T ATMEL [ATMEL Corporation], AT25DF641A-MH-T Datasheet - Page 16

• Manufacturer Part Number: AT25DF641A-MH-T
• Description: 64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

8.5
16
Program/Erase Suspend
Atmel AT25DF641A [Preliminary]
The complete opcode must be clocked into the device before the CS pin is deasserted, and the
CS pin must be deasserted on an even byte boundary (multiples of eight bits); otherwise, no
erase will be performed. In addition, if any sector of the memory array is in the protected or
locked down state, then the Chip Erase command will not be executed, and the device will return
to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be
reset back to the logical “0” state if the CS pin is deasserted on uneven byte boundaries or if a
sector is in the protected or locked down state.
While the device is executing a successful erase cycle, the Status Register can be read and will
indicate that the device is busy. For faster throughput, it is recommended that the Status Regis-
ter be polled rather than waiting the t
some point before the erase cycle completes, the WEL bit in the Status Register will be reset
back to the logical “0” state.
The device also incorporates an intelligent erase algorithm that can detect when a byte location
fails to erase properly. If an erase error occurs, it will be indicated by the EPE bit in the Status
Register.
Figure 8-6.
In some code plus data storage applications, it is often necessary to process certain high-level
system interrupts that require relatively immediate reading of code or data from the Flash mem-
ory. In such an instance, it may not be possible for the system to wait the microseconds or
milliseconds required for the Flash memory to complete a program or erase cycle. The Pro-
gram/Erase Suspend command allows a program or erase operation in progress to a particular
64-Kbyte sector of the Flash memory array to be suspended so that other device operations can
be performed. For example, by suspending an erase operation to a particular sector, the system
can perform functions such as a program or read operation within another 64-Kbyte sector in the
device. Other device operations, such as a Read Status Register, can also be performed while a
program or erase operation is suspended.
not allowed during a program or erase suspend.
Since the need to suspend a program or erase operation is immediate, the Write Enable com-
mand does not need to be issued prior to the Program/Erase Suspend command being issued.
Therefore, the Program/Erase Suspend command operates independently of the state of the
WEL bit in the Status Register.
To perform a Program/Erase Suspend, the CS pin must first be asserted and the opcode of B0h
must be clocked into the device. No address bytes need to be clocked into the device, and any
data clocked in after the opcode will be ignored. When the CS pin is deasserted, the program or
Chip Erase
SCK
SO
CS
SI
CHPE
HIGH-IMPEDANCE
MSB
C
time to determine if the device has finished erasing. At
0
Table 8-1
C
1
C
2
OPCODE
C
3
C
4
outlines the operations that are allowed and
C
5
C
6
C
7
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