AT25DF641A-MH-T ATMEL [ATMEL Corporation], AT25DF641A-MH-T Datasheet - Page 32

• Manufacturer Part Number: AT25DF641A-MH-T
• Description: 64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
• Manufacturer: ATMEL [ATMEL Corporation]

be programmed and will remain in the erased state (FFh). The programming of the data bytes is
internally self-timed and should take place in a time of t
. It is not possible to suspend the
OTPP
programming of the OTP Security Register.
The three address bytes and at least one complete byte of data must be clocked into the device
before the CS pin is deasserted, and the CS pin must be deasserted on even byte boundaries
(multiples of eight bits); otherwise, the device will abort the operation and the user-programma-
ble portion of the OTP Security Register will not be programmed. The WEL bit in the Status
Register will be reset back to the logical “0” state if the OTP Security Register program cycle
aborts due to an incomplete address being sent, an incomplete byte of data being sent, the CS
pin being deasserted on uneven byte boundaries, or because the user-programmable portion of
the OTP Security Register was previously programmed.
While the device is programming the OTP Security Register, the Status Register can be read
and will indicate that the device is busy. For faster throughput, it is recommended that the Status
Register be polled rather than waiting the t
time to determine if the data bytes have finished
OTPP
programming. At some point before the OTP Security Register programming completes, the
WEL bit in the Status Register will be reset back to the logical “0” state.
If the device is powered-down during the OTP Security Register program cycle, then the con-
tents of the 64-byte user programmable portion of the OTP Security Register cannot be
guaranteed and cannot be programmed again.
The Program OTP Security Register command utilizes the internal 256-buffer for processing.
Therefore, the contents of the buffer will be altered from its previous state when this command is
issued.
Figure 10-4. Program OTP Security Register
CS
0
1
2
3
4
5
6
7
8
9
29 30
31 32
33
34
35
36
37 38
39
SCK
OPCODE
ADDRESS BITS A23-A0
DATA IN BYTE 1
DATA IN BYTE n
SI
1
0
0
1
1
0
1
1
A
A
A
A
A
A
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
MSB
MSB
MSB
MSB
HIGH-IMPEDANCE
SO
Atmel AT25DF641A [Preliminary]
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