AT25DF641A-MH-T ATMEL [ATMEL Corporation], AT25DF641A-MH-T Datasheet - Page 4
AT25DF641A-MH-T
Manufacturer Part Number
AT25DF641A-MH-T
Description
64-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT25DF641A-MH-T.pdf
(57 pages)
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Table 2-1.
4
Symbol
HOLD
V
GND
Figure 2-1.
CC
Atmel AT25DF641A [Preliminary]
Name and Function
HOLD: The HOLD pin is used to temporarily pause serial communication without
deselecting or resetting the device. While the HOLD pin is asserted, transitions on the SCK
pin and data on the SI pin will be ignored, and the SO pin will be in a high-impedance state.
The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold
condition to start. A Hold condition pauses serial communication only and does not have an
effect on internally self-timed operations such as a program or erase cycle. Please refer to
“Hold” on page 44
The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be
used. However, it is recommended that the HOLD pin also be externally connected to V
whenever possible.
DEVICE POWER SUPPLY: The V
Operations at invalid V
attempted.
GROUND: The ground reference for the power supply. GND should be connected to the
system ground.
Pin Descriptions (Continued)
GND
8-SOIC (Top View)
WP
SO
CS
1
2
3
4
for additional details on the Hold operation.
CC
8
7
6
5
voltages may produce spurious results and should not be
VCC
HOLD
SCK
SI
CC
pin is used to supply the source voltage to the device.
Figure 2-2.
SO (SOI)
8-UDFN (Top View)
GND
WP
CS
1
2
3
4
CC
8
7
6
5
Asserted
State
Low
VCC
HOLD
SCK
SI (SIO)
-
-
8693A–DFLASH–8/10
Power
Power
Type
Input
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