MC9S08GW64_11 FREESCALE [Freescale Semiconductor, Inc], MC9S08GW64_11 Datasheet - Page 28
MC9S08GW64_11
Manufacturer Part Number
MC9S08GW64_11
Description
HC08 instruction set with added BGND instruction
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08GW64_11.pdf
(42 pages)
Electrical Characteristics
3.10
This section describes timing characteristics for each peripheral system.
28
1
2
3
Num
10
11
9
Data in Typical column was characterized at 3.0 V, 25C or is typical recommended value.
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as
the reference, this specification assumes it is already running.
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
percentage for a given interval.
Table 12. ICS Frequency Specifications (Temperature Range = –40 to 85C Ambient) (continued)
C
C
C FLL acquisition time
C Long term jitter of DCO output clock (averaged over 2-ms
AC Characteristics
Total deviation from trimmed DCO output frequency over
fixed voltage and temperature range of 0
interval)
Figure 16. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)
3
2
Characteristic
DD
MC9S08GW64 Series MCU Data Sheet, Rev. 3
and V
SS
and variation in the crystal oscillator frequency increase the C
C to 70
C
Symbol
t
f
Acquire
C
dco_t
Jitter
Min
—
—
—
Typ
0.5
0.02
—
Freescale Semiconductor
1
Max
0.2
1
1
Jitter
Bus
%f
%f
Unit
ms
.
dco
dco