CA3130AT INTERSIL [Intersil Corporation], CA3130AT Datasheet - Page 4

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CA3130AT

Manufacturer Part Number
CA3130AT
Description
15MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output
Manufacturer
INTERSIL [Intersil Corporation]
Datasheets
Schematic Diagram
Application Information
Circuit Description
Figure 1 is a block diagram of the CA3130 Series CMOS
Operational Amplifiers. The input terminals may be operated
down to 0.5V below the negative supply rail, and the output
can be swung very close to either supply rail in many
applications. Consequently, the CA3130 Series circuits are
ideal for single-supply operation. Three Class A amplifier
stages, having the individual gain capability and current
consumption shown in Figure 1, provide the total gain of the
CA3130. A biasing circuit provides two potentials for
common use in the first and second stages. Terminal 8 can
be used both for phase compensation and to strobe the
output stage into quiescence. When Terminal 8 is tied to the
negative supply rail (Terminal 4) by mechanical or electrical
means, the output potential at Terminal 6 essentially rises to
the positive supply-rail potential at Terminal 7. This condition
of essentially zero current drain in the output stage under the
strobed “OFF” condition can only be achieved when the
NOTE:
5. Diodes D
INV.-INPUT
BIAS CIRCUIT
NON-INV.
INPUT
40k
Z
8.3V
5
R
1
3
2
through D
1
+
-
5k
R
2
D
D
D
D
1
2
3
4
Q
8
1
provide gate-oxide protection for MOSFET input stage.
INPUT STAGE
4
D
5
Q
5
Q
6
CURRENT SOURCE FOR
1k
1k
D
2
R
R
6
Q
3
5
4
OFFSET NULL
Q
Q
6
(NOTE 5)
9
AND Q
1k
Q
R
10
6
7
CA3130, CA3130A
D
R
1k
7
4
Q
7
1
D
8
COMPENSATION
“CURRENT SOURCE
SECOND
STAGE
LOAD” FOR Q
Q
ohmic load resistance presented to the amplifier is very high
(e.g.,when the amplifier output is used to drive CMOS digital
circuits in Comparator applications).
Input Stage
The circuit of the CA3130 is shown in the schematic diagram.
It consists of a differential-input stage using PMOS field-effect
transistors (Q
transistors (Q
with resistors R
function as a differential-to-single-ended converter to provide
base drive to the second-stage bipolar transistor (Q
nulling, when desired, can be effected by connecting a
100,000 potentiometer across Terminals 1 and 5 and the
potentiometer slider arm to Terminal 4. Cascade-connected
PMOS transistors Q
the input stage. The biasing circuit for the constant-current
source is subsequently described. The small diodes D
3
Q
Q
5
11
11
6
9
, Q
, Q
3
through R
7
10
) working into a mirror-pair of bipolar
8
) functioning as load resistors together
2
OUTPUT
STAGE
, Q
4
are the constant-current source for
STROBING
6
. The mirror-pair transistors also
Q
Q
8
12
7
4
V+
V-
OUTPUT
6
11
). Offset
5

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