AK4359A AKM [Asahi Kasei Microsystems], AK4359A Datasheet - Page 14

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AK4359A

Manufacturer Part Number
AK4359A
Description
106dB 192kHz 24-Bit 8ch DAC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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In parallel control mode, the DIF0 and TDM0 pins as shown in
value of DIF1-0 and TDM1-0 bits are ignored. In serial control mode, the DIF2-0 and TDM1-0 bits shown in
select 11 serial data modes. Initial value of DIF2-0 bits is “010”. The setting of the DIF1 pin is ignored. In all modes the
serial data is MSB-first, 2’s complement format and is latched on the rising edge of BICK. Mode 2 can be used for 16/20
MSB justified formats by zeroing the unused LSBs.
In parallel control mode, when the TDM0 pin = “L”, the audio interface format is TDM256 mode
data of all DACs (eight channels) is input to the SDTI1 pin. The input data to SDTI2-4 pins is ignored. BICK should be
fixed to 256fs. “H” time and “L” time of LRCK should be at least 1/256fs. The audio data is MSB-first, 2’s complement
format. The input data to the SDTI1 pin is latched on the rising edge of BICK.
In serial control mode, when the TDM0 bit = “1” and the TDM1 bit = “0”, the audio interface format is TDM256 mode
(Table
ignored. BICK should be fixed to 256fs. “H” time and “L” time of LRCK should be at least 1/256fs. The audio data is
MSB-first, 2’s complement format. The input data to the SDTI1 pin is latched on the rising edge of BICK. In TDM128
mode (TDM0 bit = “1” and TDM1 bit = “1”,
the SDTI1 pin. The other four data (L3, R3, L4, R4) are input to the SDTI2 pin. The input data to SDTI3-4 pins is ignored.
BICK should be fixed to 128fs. The audio data is MSB-first, 2’s complement format. The input data to SDTI1-2 pins is
latched on the rising edge of BICK.
MS1010-E-01
TDM256
TDM128
Normal
Audio Serial Interface Format
8), and the audio data of all DACs (eight channels) is input to the SDTI1 pin. The input data to the SDTI2-4 pins is
Mode
TDM256
Normal
10
0
1
2
3
4
5
6
7
8
9
Mode
TDM1
Table 8. Audio Data Formats (Serial control mode) (N/A: Not available)
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
2
3
5
6
TDM0
Table 7. Audio Data Formats (Parallel control mode)
TDM0B
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
H
H
L
L
DIF2
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
Table
DIF0 SDTI Format
H
H
L
L
DIF1
8), the audio data of DACs (four channels; L1, R1, L2, R2) is input to
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
24-bit MSB Justified
24-bit I
24-bit MSB Justified
24-bit I
- 14 -
DIF0 SDTI Format
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
2
2
S Compatible
S Compatible
Table 7
16-bit LSB Justified
20-bit LSB Justified
24-bit MSB Justified
24-bit I
24-bit LSB Justified
N/A
N/A
24-bit MSB Justified
24-bit I
24-bit LSB Justified
N/A
N/A
24-bit MSB Justified
24-bit I
24-bit LSB Justified
2
2
2
can select four serial data modes. The register
S Compatible
S Compatible
S Compatible
LRCK
H/L
L/H
BICK
≥48fs
≥48fs
256fs
256fs
LRCK
H/L
H/L
H/L
L/H
H/L
Figure
Figure 3
Figure 4
Figure 5
Figure 6
(Table
BICK
≥32fs
≥40fs
≥48fs
≥48fs
≥48fs
256fs
256fs
256fs
128fs
128fs
128fs
7). The audio
[AK4359A]
Table 8
Figure
Figure 1
Figure 2
Figure 3
Figure 4
Figure 2
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
2008/10
can

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