M27W256-80N6TR STMicroelectronics, M27W256-80N6TR Datasheet - Page 5

• Manufacturer Part Number: M27W256-80N6TR
• Description: 256 Kbit 32Kb x 8 Low Voltage UV EPROM and OTP EPROM
• Manufacturer: STMicroelectronics

Table 7. Read Mode DC Characteristics
(T
Note: 1. V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2-line con-
trol function which accommodates the use of mul-
tiple memory connection. The two-line control
function allows:
a. the lowest possible memory power dissipation
b. complete assurance that output bus contention
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Symbol
A
V
will not occur.
I
I
V
V
I
I
CC1
CC2
I
V
IH
= 0 to 70 °C or –40 to 85 °C; V
I
CC
LO
PP
OL
OH
LI
2. Maximum DC voltage on Output is V
IL
(2)
CC
must be applied simultaneously with or before V
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
Parameter
CC
CC
+0.5V.
= 2.7 to 3.6V; V
(1)
PP
and removed simultaneously or after V
I
I
OUT
OUT
0V
E = V
E = V
Test Condition
E > V
0V
I
PP
OH
I
= 0mA, f = 8MHz
= 0mA, f = 5MHz
OL
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca-
pacitive and inductive loading of the device out-
puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor is used on every device between V
and V
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used be-
tween V
capacitor should be mounted near the power sup-
ply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the in-
ductive effects of PCB traces.
PP
E = V
V
= –400µA
= V
IL
IL
V
= 2.1mA
CC
OUT
, G = V
, G = V
IN
= V
– 0.2V
CC
IH
SS
CC
V
)
V
. This should be a high frequency type of
CC
CC
CC
IL
IL
,
,
and V
SS
for every eight devices. This
0.7 V
PP
–0.6
Min
2.4
.
CC
V
0.2 V
CC
Max
±10
0.4
±1
20
15
15
10
1
+ 0.5
CC
M27W400
Unit
mA
mA
mA
µA
µA
µA
µA
V
V
V
V
5/15
CC
CC