XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 91

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XC68HC705JJ7

Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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7.4.2 Data Direction Register B
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Address:
The contents of the port B data direction register (DDRB) determine
whether each port B pin is an input or an output. Writing a logic 1 to a
DDRB bit enables the output buffer for the associated port B pin. A
DDRB bit set to a logic 1 also disables the pulldown device for that pin.
Writing a logic 0 to a DDRB bit disables the output buffer for the
associated port B pin. A reset initializes all DDRB bits to logic 0s,
configuring all port B pins as inputs.
DDRB7–DDRB0 — Port B Data Direction Bits
Reset:
Read:
Write:
These read/write bits control port B data direction. Reset clears the
bits DDRB7–DDRB0.
1 = Corresponding port B pin configured as output and pulldown
0 = Corresponding port B pin configured as input
$0005
DDRB7
Bit 7
device disabled
0
Figure 7-6. Data Direction Register B (DDRB)
Parallel Input/Output
DDRB6
6
0
DDRB5
5
0
DDRB4
4
0
DDRB3
3
0
DDRB2
2
0
Advance Information
Parallel Input/Output
DDRB1
1
0
DDRB0
Bit 0
Port B
0
91

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