XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 99

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XC68HC705JJ7

Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet

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7.4.9 PB7/SCK Logic
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
WRITE $0005
WRITE $0001
WRITE $0011
RESET
READ $0005
READ $0001
SERIAL DATA CLOCK (SCK)
The PB7/SCK pin can be used as a simple I/O port pin or be controlled
by the SIOP serial interface as shown in
the PB7/SCK pin are summarized in
CLOCK SOURCE (MSTR)
3. If the SIOP function is terminated by clearing the SPE bit in the
4. If the PB6/SDI pin is to be a digital input, then both the SPE bit in
5. If the PB6/SDI pin is to be a digital output, then the SPE bit in the
SERIAL ENABLE (SPE)
Figure 7-12. PB7/SCK Pin I/O Circuit
R
R
SCR, then the last conditions stored in the DDRB6, PDIB6, and
PB6 register bits will then control the PB6/SDI pin.
the SCR and the DDRB6 bit must be cleared. Depending on the
external application, the pulldown device may also be disabled by
setting the PDIB6 pulldown inhibit bit.
SCR must be cleared and the DDRB6 bit must be set. The
pulldown device will be disabled in this case.
PORT B DATA
REGISTER
DATA DIRECTION
BIT PB7
REGISTER B
REGISTER B
PULLDOWN
BIT DDRB7
BIT PDIB7
Parallel Input/Output
MASK OPTION REG. ($1FF1)
Table
Figure
7-3.
7-12. The operations of
Advance Information
Parallel Input/Output
PULLDOWN
DEVICE
SCK
PB7
Port B
99

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