HEF4517BP,652 NXP Semiconductors, HEF4517BP,652 Datasheet - Page 5

IC REGISTER STATIC 64BIT 16DIP

HEF4517BP,652

Manufacturer Part Number
HEF4517BP,652
Description
IC REGISTER STATIC 64BIT 16DIP
Manufacturer
NXP Semiconductors
Series
4000Br
Datasheets

Specifications of HEF4517BP,652

Package / Case
16-DIP (0.300", 7.62mm)
Logic Type
Shift Register
Output Type
Standard
Function
Serial to Parallel
Number Of Elements
2
Number Of Bits Per Element
64
Voltage - Supply
4.5 V ~ 15.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Counting Sequence
Serial to Parallel
Number Of Circuits
2
Logic Family
HEF4000
Propagation Delay Time
60 ns
Supply Voltage (max)
15.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V, 5 V, 9 V, 12 V
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
933406710652
HEF4517BPN
HEF4517BPN
NXP Semiconductors
7. Functional description
Table 3.
[1]
8. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
HEF4517B_6
Product data sheet
Inputs
nCP nD
Symbol
V
I
V
I
I
I
T
T
P
P
IK
OK
I/O
DD
stg
amb
DD
I
tot
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance state;
↑ = positive-going transition; ↓ = negative-going transition.
For DIP16 package: P
For SO16 package: P
data entered
into 1st bit
data entered
into 1st bit
X
X
Function table
Limiting values
Parameter
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
power dissipation
nPE/OE
L
H
L
H
tot
tot
derates linearly with 8 mW/K above 70 °C.
derates linearly with 12 mW/K above 70 °C.
[1]
Inputs/outputs
nQ16
content of
16th bit
displayed
data at nQ16
entered into
17th bit
no change
Z
Conditions
V
V
DIP16 package
SO16 package
per output
nQ32
content of
32nd bit
displayed
data at nQ32
entered into
33rd bit
no change
Z
I
O
Rev. 06 — 10 December 2009
< −0.5 V or V
< −0.5 V or V
nQ48
content of
48th bit
displayed
data at nQ48
entered into
49th bit
no change
Z
I
O
> V
> V
DD
DD
+ 0.5 V
+ 0.5 V
nQ64
content of
64th bit
displayed
remains in ‘Z’
state
no change
Z
[1]
[2]
Min
−0.5
-
−0.5
-
-
-
−65
−40
-
-
-
Dual 64-bit static shift register
Mode
One 64-bit shift register. The
content of the shift register is
shifted over one stage
Four 16-bit shift register. The
content of the shift registers is
shifted over one stage
no change
no change
HEF4517B
Max
V
+150
+18
±10
±10
±10
+85
750
500
100
DD
50
© NXP B.V. 2009. All rights reserved.
+ 0.5
Unit
V
mA
V
mA
mA
mA
°C
°C
mW
mW
mW
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