HEF4517BP,652 NXP Semiconductors, HEF4517BP,652 Datasheet - Page 9

• Manufacturer Part Number: HEF4517BP,652
• Description: IC REGISTER STATIC 64BIT 16DIP
• Manufacturer: NXP Semiconductors
• Series: 4000Br

Specifications of HEF4517BP,652

• Package / Case: 16-DIP (0.300", 7.62mm)
• Logic Type: Shift Register
• Output Type: Standard
• Function: Serial to Parallel
• Number Of Elements: 2
• Number Of Bits Per Element: 64
• Voltage - Supply: 4.5 V ~ 15.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Counting Sequence: Serial to Parallel
• Number Of Circuits: 2
• Logic Family: HEF4000
• Propagation Delay Time: 60 ns
• Supply Voltage (max): 15.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V, 9 V, 12 V
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 933406710652; HEF4517BPN; HEF4517BPN

NXP Semiconductors
HEF4517B_6
Product data sheet
Fig 5.
Fig 6.
Fig 7.
Measurement points are given in
The logic levels V
Enable and disable times and 3-state propagation delays
The logic levels V
Transition times for nQn
The shading indicates where the data (nQn and nD) is permitted to change for predictable output changes.
Measurement points are given in
The logic levels V
Waveforms showing minimum clock pulse width and maximum frequency and set-up and hold times for
nQn (as data input) or nD to nCP
nQn, nD input
nCP input
0 V
0 V
V
V
OH
OH
OH
I
I
HIGH-to-OFF
OFF-to-HIGH
nPE/OE input
LOW-to-OFF
OFF-to-LOW
nQn output
nQn output
and V
and V
and V
V
OL
nQn output
OL
OL
t
su
M
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur with the output load.
are typical voltage output levels that occur with the output load.
V
V
V
GND
V
Table 9
Table 9
V
OH
V
OL
M
0 V
t
OH
DD
OL
h
V
I
Rev. 06 — 10 December 2009
1/f
max
V
M
10 %
enabled
t
outputs
t
t
PLZ
t
PHZ
90 %
t
W
V
X
V
Y
disabled
outputs
t
PZL
t
t
t
PZH
001aaj916
V
M
V
Dual 64-bit static shift register
M
outputs
enabled
001aaj913
HEF4517B
001aae697
© NXP B.V. 2009. All rights reserved.
9 of 15