ZL50114GAG2 ZARLINK [Zarlink Semiconductor Inc], ZL50114GAG2 Datasheet - Page 11

• Manufacturer Part Number: ZL50114GAG2
• Description: 128, 256 and 1024 Channel CESoP Processors
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

1.0
The following table captures the changes from the February 2006 issue.
The following table captures the changes from the April 2005 issue.
The following table captures the changes from the January 2005 issue.
The following table captures the changes from the October 2004 issue.
The following table captures the changes from the September 2004 issue.
12, 16, 19
41, 42
Page
Page
Page
Page
Page
86
57
89
89
42
73
98
Changes Summary
Figure 45
Fig. 2 and Ball Signal
Table 38, Table 38 - External
Memory Timing
Section 3.6 and Section 3.7.2
Section 6.3
Figure 44
Section 3.7.1
Assignment Table
DC Electrical Characteristics
Table and Output Levels Table
Section 13.3
Item
Item
Item
Item
Item
Zarlink Semiconductor Inc.
ZL50110/11/14
Added Minimum Values
Clarified ZL50111 supports 3 MII ports, ZL50110/4 support 2 MII
ports.
Added external pull-up/pull-down resistor recommendations for
SYSTEM_RST, SYSTEM_DEBUG, JTAG_TRST, JTAG_TCK.
Added Section 6.3 SYSTEM_CLK Considerations.
Clarified data sheet to indicate ZL5011x supports clock
recovery in both synchronous and asynchronous modes of
operation.
Inverted polarity of CPU_DREQ0 and CPU_DREQ1 to conform
with default MPC8260. Polarity of CPU_DREQ and
CPU_SDACK remains programmable through API.
Inverted polarity of CPU_DREQ0 and CPU_DREQ1 to conform
with default MPC8260. Polarity of CPU_DREQ and
CPU_SDACK remains programmable through API.
Added 5 kohm pulldown recommendation to GPIO signals.
Corrected Mx_LINKUP_LED pin assignment.
Changed Electrical Characteristics to differentiate between
3.3 V and 5 V tolerant signals.
New section added; Mx_LINKUP_LED Outputs.
11
Change
Change
Change
Change
Change
Data Sheet