HYS64T128021GDL-37-A INFINEON [Infineon Technologies AG], HYS64T128021GDL-37-A Datasheet - Page 6

• Manufacturer Part Number: HYS64T128021GDL-37-A
• Description: 200-Pin Small Outline Dual-In-Line Memory Module
• Manufacturer: INFINEON [Infineon Technologies AG]

200-Pin Small Outline Dual-In-Line Memory Module
DDR2 SDRAM
1
This chapter gives an overview of the 1.8 V 200-Pin Small Outline Dual-In-Line Memory Module, 256 MByte and
512 MByte and describes its main characteristics.
1.1
•
•
•
•
Table 1
Product Type Speed Code
Speed Grade
max. Clock Frequency
min. RAS-CAS-Delay
min. Row Precharge Time
min. Row Active Time
min. Row Cycle Time
1.2
The INFINEON
HYS64T[32000/64020/128021][G/H]DL–[3.7/5]–A
module family are low profile SO-DIMM modules with
30,0 mm height based on DDR2 technology. DIMMs
are available as Non-ECC modules in 32M
(256 MByte),64M
(1 GByte) organisation and density, intended for
mounting into 200-pin connector sockets.
Data Sheet
200-pin Non-ECC Unbuffered 8-Byte Dual-In-Line
DDR2 SDRAM Module for Notebooks and other
application where small form factors are required.
One rank 32M
128M
64M
JEDEC standard Double-Data-Rate-Two
Synchronous DRAMs (DDR2 SDRAM) with a single
+ 1.8 V (± 0.1 V) power supply
256 ,512 MByte and 1GByte modules built with
512Mb DDR2 SDRAMs in 60-ball FBGA
(P–TFBGA–60) and 84-ball FBGA (P–TFBGA–84)
chipsize packages
8 chip organisation
64 module organisation and 32M
Overview
Features
Performance
Description
64 (512 MByte) and 128M
64, two ranks 64M
@CL5
@CL4
@CL3
64 and
64
f
f
f
t
t
t
t
CK5
CK4
CK3
RCD
RP
RAS
RC
16 and
64
–3.7
PC2–4200 4–4–4
266
266
200
15
15
45
60
6
•
•
•
•
•
•
•
The memory array is designed with 512Mb Double-
Data-Rate-Two (DDR2) Synchronous DRAMs.
Decoupling capacitors are mounted on the PCB board.
The DIMMs feature serial presence detect based on a
serial E
first 128 bytes are programmed with configuration data
and are write protected; the second 128 bytes are
available to the customer.
Programmable CAS Latencies (3, 4 and 5), Burst
Length (4 & 8) and Burst Type
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_1.8 compatible
Off-Chip Driver Impedance Adjustment(OCD) and
On-Die Termination(ODT)
Serial Presence Detect with E
Low Profile Modules form factor: 67.60 mm x 30.00
mm (MO-224)
Based on JEDEC standard reference layouts Raw
Card “A”, “C” and “D”
2
PROM device using the 2-pin I
HYS64T128021[G/H]DL–[3.7/5]–A
HYS64T32000[G/H]DL–[3.7/5]–A
HYS64T64020[G/H]DL–[3.7/5]–A
–5
PC2–3200 3–3–3
200
200
200
15
15
40
55
09122003-FTXN-KM26
2
PROM
Rev. 0.91, 2004-06
2
C protocol. The
Units
—
MHz
MHz
MHz
ns
ns
ns
ns