HYS64V2100GCU-10 SIEMENS [Siemens Semiconductor Group], HYS64V2100GCU-10 Datasheet - Page 8

• Manufacturer Part Number: HYS64V2100GCU-10
• Description: 3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Semiconductor Group
Parameter
Bank to Bank Delay Time
CAS to CAS delay time (same bank)
Refresh Cycle
Self Refresh Exit Time
Refresh Period (4096 cycles)
Read Cycle
Data Out Hold Time
Data Out to Low Impedance Time
Data Out to High Impedance Time
DQM Data Out Disable Latency
Write Cycle
Data In Setup Time
Data In Hold Time
Data input to Precharge
Data In to Active/refresh
DQM Write Mask Latency
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
RRD
CCD
SREX
REF
OH
LZ
HZ
DQZ
DS
DH
DPL
DAL
DQW
8
min
2Clk
+t
20
Limit Values
1
–
3
0
–
–
–
2
3
1
0
2
5
RC
2M x 64/72 SDRAM-Module
HYS64(72)V2100G(C)U-10
-10
max
64
25
–
–
–
–
–
6
8
–
–
–
–
–
–
Unit
ns
CLK
ns
ms
ns
ns
ns
ns
ns
CLK
ns
ns
CLK
CLK
CLK
Note
8
7
9
10