HY5DU283222AF-5 HYNIX [Hynix Semiconductor], HY5DU283222AF-5 Datasheet - Page 17

• Manufacturer Part Number: HY5DU283222AF-5
• Description: 128M(4Mx32) GDDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

MODE REGISTER SET (MRS)
The mode register is used to store the various operating modes such as /CAS latency, addressing mode, burst length,
burst type, test mode, DLL reset. The mode register is program via MRS command. This command is issued by the low
signals of /RAS, /CAS, /CS, /WE and BA0. This command can be issued only when all banks are in idle state and CKE
must be high at least one cycle before the Mode Register Set Command can be issued. Two cycles are required to write
the data in mode register. During the the MRS cycle, any command cannot be issued. Once mode register field is
determined, the information will be held until resetted by another MRS command.
Rev. 0.7 / Jun. 2004
BA1
0
BA0
0
1
BA0
0
A11
MRS Type
EMRS
MRS
RFU
A10
A9
A8
DR
A8
0
1
A6
0
0
0
0
1
1
1
1
DLL Reset
A5
TM
A7
0
0
1
1
0
0
1
1
A7
0
1
Yes
No
A4
Test Mode
0
1
0
1
0
1
0
1
test mode
A6
Normal
Vendor
CAS Latency
CAS Latency
Reserved
Reserved
Reserved
Reserved
Reserved
A5
3
4
5
A4
A3
BT
A3
0
1
A2
A2
0
0
0
0
1
1
1
1
Burst Length
A1
A1
0
0
1
1
0
0
1
1
Burst Type
Sequential
Interleave
A0
0
1
0
1
0
1
0
1
A0
Sequential
Reserved
Reserved
Reserved
Reserved
Reserved
HY5DU283222AF
2
4
8
Burst Length
Interleave
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
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