HY5DU283222AF-5 HYNIX [Hynix Semiconductor], HY5DU283222AF-5 Datasheet - Page 27

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HY5DU283222AF-5

Manufacturer Part Number
HY5DU283222AF-5
Description
128M(4Mx32) GDDR SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Row Cycle Time
Auto Refresh Row Cycle
Time
Row Active Time
Row Address to Column
Address Delay for Read
Row Address to Column
Address Delay for Write
Row Active to Row Active
Delay
Column Address to
Column Address Delay
Row Precharge Time
Write Recovery Time
Last Data-In to Read
Command
Auto Precharge Write
Recovery + Precharge
Time
System Clock
Cycle Time
Clock High Level Width
Clock Low Level Width
Data-Out edge to Clock
edge Skew
DQS-Out edge to Clock
edge Skew
DQS-Out edge to Data-
Out edge Skew
Data-Out hold time from
DQS
Clock Half Period
Data Hold Skew Factor
AC CHARACTERISTICS - I (continue)
Rev. 0.7 / Jun. 2004
Parameter
CL=5
CL=4
CL=3
Symbol
t
t
t
RCDWR
t
RCDRD
DQSCK
t
t
DQSQ
t
t
t
t
t
t
t
t
t
RRD
CCD
t
t
t
t
QHS
RFC
RAS
DRL
DAL
t
WR
CH
QH
RC
RP
CK
AC
HP
CL
tHPmin
-tQHS
tCH/L
0.45
0.45
Min
-0.6
-0.6
min
2.8
16
17
10
5
2
4
1
5
3
2
8
-
-
-
-
28
100K
Max
0.55
0.55
0.35
0.35
0.6
0.6
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tHPmin
-tQHS
tCH/L
Min
0.45
0.45
-0.6
-0.6
min
3.3
4.5
14
17
9
5
2
3
1
5
3
2
8
-
-
-
33
100K
Max
0.55
0.55
0.35
0.35
0.6
0.6
10
10
-
-
-
-
-
-
-
-
-
-
-
-
-
tHPmin
-tQHS
tCH/L
0.45
0.45
Min
-0.6
-0.6
min
3.6
4.5
14
16
9
5
2
3
1
5
3
2
8
-
-
-
36
100K
Max
0.55
0.55
0.6
0.6
0.4
0.4
10
10
-
-
-
-
-
-
-
-
-
-
-
-
-
tHPmin
-tQHS
tCH/L
0.45
0.45
Min
-0.6
-0.6
min
4.5
13
15
8
5
2
3
1
5
3
2
7
4
-
-
-
4
100K
Max
0.55
0.55
0.6
0.6
0.4
0.4
10
10
-
-
-
-
-
-
-
-
-
-
-
-
-
HY5DU283222AF
tHPmin
-tQHS
tCH/L
0.45
0.45
Min
-0.6
-0.6
min
10
12
7
4
2
2
1
4
2
2
6
5
-
-
-
-
5
100K
Max
0.55
0.55
0.6
0.6
0.4
0.4
10
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
27
Note
1,6
1,5
6

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