HY5PS1G831LF-C4 HYNIX [Hynix Semiconductor], HY5PS1G831LF-C4 Datasheet - Page 12

• Manufacturer Part Number: HY5PS1G831LF-C4
• Description: 1Gb DDR2 SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 1.2 / Dec 2006
3.2.4 Differential Input AC logic Level
1. V
UDQS.
2. V
or UDQS) level and V
IL(DC)
Notes:
1. V
LDQS or UDQS) and V
- V
2. The typical value of V
VDDQ . V
3.2.5 Differential AC output parameters
Notes:
1. The typical value of V
in VDDQ . V
IL(AC)
Symbol
IN(DC)
ID(DC
ID(AC)
Symbol
V
V
V
.
OX
ID
IX
(ac)
(ac)
.
(ac)
) specifies the input differential voltage |V
specifies the input differential voltage |V
specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS, LDQS, UDQS and
IX(AC)
OX(AC)
indicates the voltage at which differential input signals must cross.
ac differential input voltage
ac differential cross point voltage
ac differential cross point voltage
indicates the voltage at whitch differential output signals must cross.
CP
CP
IX(AC)
OX(AC)
is the complementary input (such as CK, DQS, LDQS or UDQS) level. The minimum value is equal to V
is the complementary input signal (such as CK, DQS, LDQS or UDQS). The minimum value is equal to V
V
is expected to be about 0.5 * VDDQ of the transmitting device and V
V
is expected to be about 0.5 * V DDQ of the transmitting device and V
CP
TR
Parameter
Parameter
TR
TR
< Differential signal levels >
-V
-V
CP
CP
| required for switching, where V
| required for switching, where V
V
V
DDQ
SSQ
V
0.5 * VDDQ - 0.175
0.5 * VDDQ - 0.125
ID
Min.
Min.
0.5
V
TR
TR
IX or
0.5 * VDDQ + 0.175
0.5 * VDDQ + 0.125
is the true input signal (such as CK, DQS,
is the true input (such as CK, DQS, LDQS
V
Crossing point
IX(AC)
DDQ
V
OX(AC
Max.
Max.
1HY5PS1G431(L)F
1HY5PS1G831(L)F
OX
+ 0.6
is expected to track variations in
) is expected to track variations
Units
Units
V
V
V
IH(DC)
Notes
Notes
12
IH(AC)
1
2
1
- V