HY5PS1G831LF-C4 HYNIX [Hynix Semiconductor], HY5PS1G831LF-C4 Datasheet - Page 20

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HY5PS1G831LF-C4

Manufacturer Part Number
HY5PS1G831LF-C4
Description
1Gb DDR2 SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Rev. 1.2 / Dec 2006
Four Active Window for 2KB page size products
CAS to CAS command delay
Write recovery time
Auto precharge write recovery + precharge time
Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read
command
Exit active power down to read command
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
Parameter
tFAW
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
t
Symbol
t
AONPD
AOFPD
t
tANPD
t
tAXPD
tDelay
AOND
AOFD
t
t
t
CKE
AON
AOF
tOIT
tIS+tCK+tIH
tAC(min)+2
tAC(min)+2
tRFC + 10
WR+tRP*
tAC(min)
tAC(min)
6 - AL
min
200
7.5
2.5
50
15
10
2
2
2
3
2
3
8
0
DDR2-400
tAC(max)+1
2.5tCK+tAC
2tCK+tAC(
tAC(max)+
(max)+1
max)
max
2.5
0.6
+1
12
2
-
-
-
-
-
-
tIS+tCK+tIH
tAC(min)+2
tAC(min)+2
tRFC + 10
WR+tRP*
tAC(min)
tAC(min)
6 - AL
min
200
7.5
7.5
2.5
50
15
2
2
3
2
3
8
0
2
DDR2-533
1HY5PS1G431(L)F
1HY5PS1G831(L)F
tAC(max)+
2tCK+tAC(
tAC(max)+
2.5tCK+tA
C(max)+1
max)+1
max
2.5
0.6
12
2
1
-
-
-
-
-
-
-Continued
tCK
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1, 2
14
24
16
17
15
20
3
1

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