H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 233

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.5.4
TCNT is cleared when compare-match A or compare-match B occurs, depending on the setting of
the CCLR1 and CCLR0 bits in TCR. Figure 10.8 shows the timing of clearing the counter by a
compare-match.
10.5.5
TCNT is cleared at the rising edge of an external reset input, depending on the settings of the
CCLR1 and CCLR0 bits in TCR. The width of the clearing pulse must be at least 1.5 states. Figure
10.9 shows the timing of clearing the counter by an external reset input.
Timing of Counter Clear at Compare-Match
TCNT External Reset Timing
Compare-match
signal
TCNT
External reset
input pin
Clear signal
TCNT
Figure 10.9 Timing of Counter Clear by External Reset Input
Figure 10.8 Timing of Counter Clear by Compare-Match
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Rev. 2.00 Mar 21, 2006 page 195 of 518
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Section 10 8-Bit Timer (TMR)
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REJ09B0299-0200

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