H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 260

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H8S2110B

Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 12 Serial Communication Interface (SCI)
Clocked Synchronous Mode:
A block diagram of the SCI is shown in figure 12.1.
Rev. 2.00 Mar 21, 2006 page 222 of 518
REJ09B0299-0200
Data length: 8 bits
Receive error detection: Overrun errors
Serial data communication with other LSIs that have the clock synchronized communication
function
ExTxD*/TxD
ExSCK*/SCK
ExRxD*/RxD
Legend:
RSR
RDR
TSR
TDR
SMR
Note:* The program development tool (emulator) does not support this function.
RDR
RSR
: Receive shift register
: Receive data register
: Transmit shift register
: Transmit data register
: Serial mode register
Figure 12.1 Block Diagram of SCI
Parity generation
Parity check
TDR
TSR
Module data bus
reception control
Transmission/
SCR
SSR
SCMR : Smart card mode register
BRR
SCMR
SMR
SSR
SCR
External clock
: Serial control register
: Serial status register
: Bit rate register
Clock
Baud rate
generator
BRR
TEI
TXI
RXI
ERI
φ
φ/4
φ/16
φ/64

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