H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 331

• Manufacturer Part Number: H8S2110B
• Description: Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

13.3.8
ICXR enables or disables the I
operation, and indicates the status of receive/transmit operations.
Bit Bit Name
7
6
STOPIM
HNDS
I
2
C Bus Extended Control Register (ICXR)
Initial Value R/W
0
0
2
C bus interface interrupt generation and continuous receive
R/W
R/W
Description
Stop Condition Interrupt Source Mask
Enables or disables the interrupt generation when the stop
condition is detected in slave mode.
0: Enables IRIC flag setting and interrupt generation when
the stop condition is detected (STOP = 1 or ESTP = 1) in
slave mode.
1: Disables IRIC flag setting and interrupt generation when
the stop condition is detected.
Handshake Receive Operation Select
Enables or disables continuous receive operation in receive
mode.
0: Enables continuous receive operation
1: Disables continuous receive operation
When the HNDS bit is cleared to 0, receive operation is
performed continuously after data has been received
successfully while ICDRF flag is 0.
When the HNDS bit is set to 1, SCL is fixed to the low level
and the next data transfer is disabled after data has been
received successfully while the ICDRF flag is 0. The bus
line is released and next receive operation is enabled by
reading the receive data in ICDR.
Rev. 2.00 Mar 21, 2006 page 293 of 518
Section 13 I
2
C Bus Interface (IIC)
REJ09B0299-0200