MAX11329ATJ+ Maxim Integrated, MAX11329ATJ+ Datasheet - Page 14

• Manufacturer Part Number: MAX11329ATJ+
• Description: Analog to Digital Converters - ADC 10Bit 16Ch 3Mbps Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11329ATJ+

• Rohs: yes
• Number Of Channels: 16/8
• Architecture: SAR
• Conversion Rate: 3 MSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 72.3 dB
• Interface Type: BiCMOS
• Operating Supply Voltage: 1.5 V to 3.6 V, 2.35 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-EP-32
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: External

The MAX11329–MAX11332 are 12-/10-bit with external
reference and industry-leading 500kHz, full linear band-
width, high-speed, low-power, serial output successive
approximation register (SAR) analog-to-digital converters
(ADC). These devices feature scan mode, internal aver-
aging to increase SNR, and AutoShutdown.
The external clock mode features the SampleSet technol-
ogy, a user-programmable analog input channel sequenc-
er. The user may define and load a unique sequencing
pattern into the ADC allowing both high- and low-frequen-
cy inputs to be converted without interface activity. This
feature frees the controlling unit for other tasks while lower-
ing overall system noise and power consumption.
The MAX11329–MAX11332 include internal clock. The
internal clock mode features an integrated FIFO, allowing
data to be sampled at high speed and then held for read-
out at any time or at a lower clock rate. Internal averaging
Maxim Integrated
Post-Mux External Signal Conditioning Access
AIN(N-1)
AIN(N)
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
AIN0
AIN1
AIN2
AIN3
Detailed Description
MAX11329–MAX11332
MUX
I/P
DIFFERENTIAL
SINGLE-
ENDED/
AOP
BUS
AON
OSCILLATOR
AIN
is also supported in this mode improving SNR for noisy
input signals. All input channels are configurable for sin-
gle-ended, fully differential or pseudo-differential inputs
in unipolar or bipolar mode. The MAX11329–MAX11332
operate from a 2.35V to 3.6V supply and consume only
15.2mW at 3Msps.
The MAX11329–MAX11332 include AutoShutdown, fast
wake-up, and a high-speed 3-wire serial interface. The
devices feature full power-down mode for optimal power
management.
Data is converted from analog voltage sources in a
variety of channel and data-acquisition configurations.
Microprocessor (FP) control is made easy through a 3-wire
SPI-/QSPI-/MICROWIRE-compatible serial interface.
AOP and AON are the output pins of the internal multi-
plexer while AIP and AIN are the ADC inputs which are all
accessible externally through pins. This allows flexibility
to the system designer to process all signals through one
PGA (programmable gain amplifier), filter or gain stage
AIP
Functional Diagrams (continued)
MAX11329–MAX11332
REF+
CS
CONTROL LOGIC
REF+
SEQUENCER
ADC
AND
SCLK
REF-
REF-
CS
SCLK
DIN
DOUT
CNVST
EOC
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