MAX11329ATJ+ Maxim Integrated, MAX11329ATJ+ Datasheet - Page 19

• Manufacturer Part Number: MAX11329ATJ+
• Description: Analog to Digital Converters - ADC 10Bit 16Ch 3Mbps Precision ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11329ATJ+

• Rohs: yes
• Number Of Channels: 16/8
• Architecture: SAR
• Conversion Rate: 3 MSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 72.3 dB
• Interface Type: BiCMOS
• Operating Supply Voltage: 1.5 V to 3.6 V, 2.35 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-EP-32
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: External

Alternatively, set SWCNV to 1 in the ADC Mode Control
register
edge instead of cycling CNVST
operation, CS must be held low for 17 clock cycles to
guarantee that the device interprets the SWCNV setting.
Wait until EOC goes low before pulling CS low to com-
municate with the serial interface. Upon completing the
conversion, SWCNV is reset to 0
The MAX11329–MAX11332 produce a digital output that
corresponds to the analog input voltage as long as the
analog inputs are within the specified operating range.
Internal protection diodes confine the analog input volt-
age within the region of the analog power input rails
(V
from GND - 0.3V to V
device. Input voltages beyond GND - 0.3V and V
0.3V forward bias the internal protection diodes. Limit the
forward diode current to less than 50mA to avoid dam-
age to the MAX11329–MAX11332.
When writing to the ADC Configuration register, set
ECHO to 1 in ADC Configuration register to echo back
the configuration data onto DOUT at time n+1
Table
The MAX11329–MAX11332 feature nine scan modes
(Table
The next channel to be selected is identified in each SPI
frame. The conversion results are sent out in the next
frame. The manual mode works with the external clock
only. The FIFO is unused.
Figure 8. Echo Back the Configuration Data
Maxim Integrated
DD
, GND) and allow the analog input voltage to swing
6).
3).
(Figure
Post-Mux External Signal Conditioning Access
4) to initiate conversions with CS rising
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
DD
DOUT
DIN
CS
+ 0.3V without damaging the
(Figure
(Table
TURN ON ECHO
t = n-1
Analog Input
7).
Scan Modes
2). For proper
Manual Mode
(Figure
ECHO
CONFIGURATION
DD
DATA
t = n
8,
+
Repeat scanning channel N for number of times and
store all the conversion results in the FIFO. The number of
scans is programmed in the ADC Configuration register.
The repeat mode works with the internal clock only.
In Custom_Int and Custom_Ext modes, the device scans
preprogrammed channels in ascending order. The chan-
nels to be scanned in sequence are programmed in the
Custom Scan0 or Custom Scan1 registers (see
and
on the thirteenth falling edge of SCLK. Custom_Int works
with the internal clock. Custom_Ext works with the exter-
nal clock.
In Standard_Int and Standard_Ext modes, the device
scans channels 0 through N in ascending order where
N is the last channel specified in the ADC Mode Control
register. A new I/P MUX is selected every frame on the
thirteenth falling edge of SCLK. Standard_Int works with
the internal clock. Standard_Ext works with the external
clock.
In Upper_Int and Upper_Ext modes, the device scans
channels N through 15/11/7/3 in ascending order where
N is the first channel specified in the ADC Mode Control
register. A new I/P MUX is selected every frame on the
thirteenth falling edge of SCLK. Upper_Int works with the
internal clock. Upper_Ext works with the external clock.
The SampleSet mode of operation allows the definition
of a unique channel sequence combination with maxi-
mum length of 256. SampleSet is supported only in the
external clock mode. SampleSet is ideally suited for mul-
tichannel measurement applications where some analog
inputs must be converted more often than others.
CONFIGURATION
CONFIGURATION
Table
MAX11329–MAX11332
t = n+1
DATA
DATA
13). A new I/P MUX is selected every frame
CONFIGURATION
CONFIGURATION
t = n+2
DATA
DATA
Standard_Int and Standard_Ext
Custom_Int and Custom_Ext
Upper_Int and Upper_Ext
Repeat Mode
SampleSet
Table 12
19