S9S12G128F0VLF Freescale Semiconductor, S9S12G128F0VLF Datasheet - Page 290

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S9S12G128F0VLF

Manufacturer Part Number
S9S12G128F0VLF
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G128F0VLF

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT

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Background Debug Module (S12SBDMV1)
7.3.2
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
292
0x3_FF00
0x3_FF01
0x3_FF02
0x3_FF03
0x3_FF04
0x3_FF05
0x3_FF06
0x3_FF07
Address
Global
Register Descriptions
BDMCCR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
BDMSTS
Register
Name
0x3_FF0C–0x3_FF0E
0x3_FF00–0x3_FF0B
0x3_FF10–0x3_FFFF
Global Address
0x3_FF0F
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
ENBDM
CCR7
Bit 7
X
X
X
X
X
X
0
MC9S12G Family Reference Manual,
Figure 7-2. BDM Register Summary
= Unimplemented, Reserved
= Indeterminate
BDMACT
CCR6
Table 7-2. BDM Memory Map
X
X
X
X
X
6
0
Family ID (part of BDM firmware ROM)
CCR5
X
X
X
X
X
5
0
0
BDM firmware ROM
BDM firmware ROM
BDM registers
Module
CCR4
SDV
X
X
X
X
X
4
0
Rev.1.23
Figure
TRACE
CCR3
X
X
X
X
X
3
0
0
7-2. Registers are accessed by
= Implemented (do not alter)
= Always read zero
CCR2
X
X
X
X
X
2
0
0
Freescale Semiconductor
(Bytes)
Size
UNSEC
240
12
CCR1
3
1
X
X
X
X
1
0
0
CCR0
Bit 0
X
X
X
X
0
0
0

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