S9S12G128F0VLF Freescale Semiconductor, S9S12G128F0VLF Datasheet - Page 818

• Manufacturer Part Number: S9S12G128F0VLF
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

16 KByte Flash Module (S12FTMRG16K1V1)
24.4.6.14 Erase Verify EEPROM Section Command
The Erase Verify EEPROM Section command will verify that a section of code in the EEPROM is erased.
The Erase Verify EEPROM Section command defines the starting point of the data to be verified and the
number of words.
Upon clearing CCIF to launch the Erase Verify EEPROM Section command, the Memory Controller will
verify the selected section of EEPROM memory is erased. The CCIF flag will set after the Erase Verify
EEPROM Section operation has completed. If the section is not erased, it means blank check failed, both
MGSTAT bits will be set.
820
1
As defined by the memory map for FTMRG32K1.
Register
FSTAT
Table 24-58. Erase Verify EEPROM Section Command FCCOB Requirements
Field margin levels must only be used during verify of the initial factory
programming.
Field margin levels can be used to check that Flash memory contents have
adequate margin for data retention at the normal level setting. If unexpected
results are encountered when checking Flash memory contents at field
margin levels, the Flash memory contents should be erased and
reprogrammed.
MGSTAT1
MGSTAT0
ACCERR
Table 24-57. Set Field Margin Level Command Error Handling
Error Bit
FPVIOL
CCOBIX[2:0]
000
001
010
MC9S12G Family Reference Manual,
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid FlashBlockSelectionCode[1:0] is supplied (See
Set if an invalid margin level setting is supplied
None
None
None
Global address [15:0] of the first word to be verified
0x10
Number of words to be verified
CAUTION
NOTE
FCCOB Parameters
Global address [17:16] to
Error Condition
identify the EEPROM
Rev.1.23
block
Table
24-25)
Freescale Semiconductor
Table 24-32
)
1