S9S12GN32F0VLF Freescale Semiconductor, S9S12GN32F0VLF Datasheet - Page 920

• Manufacturer Part Number: S9S12GN32F0VLF
• Description: 16-bit Microcontrollers - MCU 16-bit32k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN32F0VLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2048 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

48 KByte Flash Module (S12FTMRG48K1V1)
Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set User Margin Level command are defined in
922
Register
FSTAT
When the EEPROM block is targeted, the EEPROM user margin levels are
applied only to the EEPROM reads. However, when the P-Flash block is
targeted, the P-Flash user margin levels are applied to both P-Flash and
EEPROM reads. It is not possible to apply user margin levels to the P-Flash
block only.
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
MGSTAT1
MGSTAT0
ACCERR
Table 26-56. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
1
2
(CCOBIX=001)
Table 26-55. Valid Set User Margin Level Settings
Read margin to the erased state
Read margin to the programmed state
0x0000
0x0001
0x0002
CCOB
MC9S12G Family Reference Manual,
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid margin level setting is supplied
None
None
None
Set if an invalid FlashBlockSelectionCode[1:0] is supplied (See
NOTE
NOTE
Return to Normal Level
User Margin-1 Level
User Margin-0 Level
Level Description
Error Condition
Rev.1.23
1
2
Table
26-27)
Table
Freescale Semiconductor
26-55.
Table 26-34
)