S9S12GN16F0MLF Freescale Semiconductor, S9S12GN16F0MLF Datasheet - Page 321

• Manufacturer Part Number: S9S12GN16F0MLF
• Description: 16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN16F0MLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1024 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

8.3.2.7.1
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG is not armed.
This register is visible at 0x0027 only with COMRV[1:0] = 00. The state control register 1 selects the
targeted next state whilst in State1. The matches refer to the match channels of the comparator match
control logic as depicted in
Register
DBGXCTL control register.
Freescale Semiconductor
Address: 0x0027
SC[3:0]
SC[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
Reset
Field
3–0
W
R
(DBGXCTL). Comparators must be enabled by setting the comparator enable bit in the associated
These bits select the targeted next state whilst in State1, based upon the match event.
0
0
7
Debug State Control Register 1 (DBGSCR1)
Figure 8-9. Debug State Control Register 1 (DBGSCR1)
= Unimplemented or Reserved
0
0
6
Table 8-14. State Control Register Access Encoding
Figure 8-1
Table 8-16. State1 Sequencer Next State Selection
COMRV
MC9S12G Family Reference Manual, Rev.1.23
Table 8-15. DBGSCR1 Field Descriptions
01
10
11
Description (Unspecified matches have no effect)
0
0
5
and described in
Match1 to State3.........Match0 to Final State
Match0 to State2....... Match1 to State3
Match0 to State2....... Match2 to State3
Either Match0 or Match1 to State2
Any match to Final State
Visible State Control Register
0
0
4
Match2 to State2
Match1 to State2
Match1 to State3
Match0 to State3
Description
Reserved
Section 8.3.2.8.1, “Debug Comparator Control
DBGSCR2
DBGSCR3
DBGMFR
SC3
0
3
SC2
0
2
S12S Debug Module (S12SDBGV2)
SC1
0
1
SC0
0
0
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