S9S12G192F0VLH Freescale Semiconductor, S9S12G192F0VLH Datasheet - Page 156

• Manufacturer Part Number: S9S12G192F0VLH
• Description: 16-bit Microcontrollers - MCU 16BIT 192KB FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G192F0VLH

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT

Port Integration Module (S12GPIMV1)
2.1.2
The PIM establishes the interface between the peripheral modules and the I/O pins. It controls the
electrical pin properties as well as the signal prioritization and multiplexing on shared pins.
The family devices share same sets of package options (refer to device overview section) determining the
availability of pins and the related PIM memory maps. The corresponding devices are referenced
throughout this section by their group name as shown in
2.1.3
The PIM includes these distinctive registers:
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Data registers and data direction registers for ports A, B, C, D, E, T, S, M, P, J and AD when used
as general-purpose I/O
Control registers to enable/disable pull devices and select pullups/pulldowns on ports T, S, M, P, J
and AD on per-pin basis
Single control register to enable/disable pull devices on ports A, B, C, D and E, on per-port basis
and on BKGD pin
Control registers to enable/disable open-drain (wired-or) mode on ports S and M
Interrupt flag register for pin interrupts on ports P, J and AD
Control register to configure IRQ pin operation
Routing register to support programmable signal redirection in 20 TSSOP only
Routing register to support programmable signal redirection in 100 LQFP package only
Package code register preset by factory related to package in use, writable once after reset. Also
includes bit to reprogram routing of API_EXTCLK in all packages.
Overview
Features
Term
Port
1
2
(100/64/48)
(64/48/32)
(48/32/20)
No 32 pin
No 20 pin
Group
G1
G2
G3
S12G240, S12GA240
S12G192, S12GA192
S12G128, S12GA128
S12G96, S12GA96
S12G64, S12GA64
S12G48, S12GA48
S12GN32, S12GNA32
S12GN16, S12GNA16
MC9S12G Family Reference Manual,
Group of general-purpose I/O pins sharing peripheral signals
Devices with same set of package options
Table 2-2. Device Groups
1
1
,
,S12GN48
1,2
1,2
Table
2-2.
Rev.1.23
Definition
Freescale Semiconductor