S9S12GN48F0VLF Freescale Semiconductor, S9S12GN48F0VLF Datasheet - Page 849

• Manufacturer Part Number: S9S12GN48F0VLF
• Description: 16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN48F0VLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 48 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

All bits in the FRSV3 register read 0 and are not writable.
25.3.2.15 Flash Reserved4 Register (FRSV4)
This Flash register is reserved for factory testing.
All bits in the FRSV4 register read 0 and are not writable.
25.3.2.16 Flash Option Register (FOPT)
The FOPT register is the Flash option register.
1
All bits in the FOPT register are readable but are not writable.
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x3_FF0E located in P-Flash memory (see
by reset condition F in
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
Freescale Semiconductor
Loaded from IFR Flash configuration field, during reset sequence.
Offset Module Base + 0x000E
Offset Module Base + 0x000F
Offset Module Base + 0x0010
Reset
Reset
Reset
W
W
W
R
R
R
F
0
0
0
0
7
7
7
1
Figure
F
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
6
1
Figure 25-20. Flash Reserved3 Register (FRSV3)
Figure 25-21. Flash Reserved4 Register (FRSV4)
25-22. If a double bit fault is detected while reading the P-Flash phrase
Figure 25-22. Flash Option Register (FOPT)
MC9S12G Family Reference Manual, Rev.1.23
F
0
0
0
0
5
5
5
1
F
0
0
0
0
4
4
4
1
NV[7:0]
F
0
0
0
0
3
3
3
1
32 KByte Flash Module (S12FTMRG32K1V1)
F
0
0
0
0
2
2
2
1
Table
F
25-4) as indicated
0
0
0
0
1
1
1
1
F
0
0
0
0
0
0
0
1
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