74AUP1T98GW,125 NXP Semiconductors, 74AUP1T98GW,125 Datasheet - Page 10

IC LP CONFIG GATE V-XLATR UMT6

74AUP1T98GW,125

Manufacturer Part Number
74AUP1T98GW,125
Description
IC LP CONFIG GATE V-XLATR UMT6
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T98GW,125

Package / Case
SC-70-6, SC-88, SOT-363
Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
2.3 V ~ 3.6 V
Logic Family
74AUP
Translation
CMOS to CMOS
Propagation Delay Time
6.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4753-2
74AUP1T98GW,125
74AUP1T98GW-G
74AUP1T98GW-G
935280471125
NXP Semiconductors
12. Waveforms
Table 10.
74AUP1T98
Product data sheet
Supply voltage
V
2.3 V to 3.6 V
Fig 12. Input A, B and C to output Y propagation delay times
CC
Measurement points are given in
V
OL
Measurement points
and V
OH
are typical output voltage levels that occur with the output load.
Output
V
0.5 × V
A, B, C input
M
Y output
Y output
CC
Table
GND
V
V
V
V
All information provided in this document is subject to legal disclaimers.
OH
OH
OL
OL
V
I
10.
Rev. 2 — 19 October 2010
Input
V
0.5 × V
V
Low-power configurable gate with voltage-level translator
M
M
V
V
M
M
t
t
I
PHL
PLH
V
1.65 V to 3.6 V
V
I
M
V
V
M
M
t
t
PLH
PHL
001aab593
74AUP1T98
t
≤ 3.0 ns
r
= t
© NXP B.V. 2010. All rights reserved.
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