74AUP1T98GW,125 NXP Semiconductors, 74AUP1T98GW,125 Datasheet - Page 17

IC LP CONFIG GATE V-XLATR UMT6

74AUP1T98GW,125

Manufacturer Part Number
74AUP1T98GW,125
Description
IC LP CONFIG GATE V-XLATR UMT6
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T98GW,125

Package / Case
SC-70-6, SC-88, SOT-363
Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
2.3 V ~ 3.6 V
Logic Family
74AUP
Translation
CMOS to CMOS
Propagation Delay Time
6.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
250 mW
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4753-2
74AUP1T98GW,125
74AUP1T98GW-G
74AUP1T98GW-G
935280471125
NXP Semiconductors
14. Abbreviations
Table 12.
15. Revision history
Table 13.
74AUP1T98
Product data sheet
Acronym
CDM
CMOS
DUT
ESD
HBM
MM
Document ID
74AUP1T98 v.2
Modifications:
74AUP1T98 v.1
Abbreviations
Revision history
Release date
20101019
20080306
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Added type number 74AUP1T98GN (SOT1115/XSON6 package).
Added type number 74AUP1T98GS (SOT1202/XSON6 package).
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Product data sheet
Rev. 2 — 19 October 2010
Low-power configurable gate with voltage-level translator
-
Change notice
-
74AUP1T98
Supersedes
74AUP1T98 v.1
-
© NXP B.V. 2010. All rights reserved.
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