ISL24011IVZ-T Intersil, ISL24011IVZ-T Datasheet - Page 7

• Manufacturer Part Number: ISL24011IVZ-T
• Description: IC DRIVER TFT/LCD HV 20-TSSOP
• Manufacturer: Intersil

Specifications of ISL24011IVZ-T

• Logic Function: Level Shifter
• Number Of Bits: 8
• Input Type: Voltage
• Output Type: Voltage
• Number Of Channels: 1
• Number Of Outputs/channel: 8
• Differential - Input:output: No/No
• Propagation Delay (max): 260ns
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Supply Voltage: -
• Voltage - Supply: -
• Data Rate: -

Typical Performance Curves
Application Information
General
The ISL24011 is an octal voltage level shifter. The part was
designed to level shift a digital input signal to +22V and -5V
for TFT-LCD displays and is capable of level shifting input
logic signals (0V to 5.5V) to outputs as large as +40V and
-20V.
Power Supply Decoupling
The ISL24011 requires a 1.0µF decoupling capacitor as
close to the V
possible, for a large load equal to 5kΩ in parallel with
4700pF (Figure 16). This will reduce any dv/dt between the
different supplies and prevent the internal ESD clamp from
turning on and damaging the part.
For lighter loads such as a series 200Ω resistor and a
3300pF capacitance, the decoupling capacitors can be
reduced to 0.47µF.
Power Supply Sequence
The ISL24011 requires that V
V
supplies, then V
The reason for this requirement is shown in Circuit 4 in the
Pin Description Table. The ESD protection diode between
V
drop greater than V
sequence: V
The ESD protection scheme is based on diodes from the
pins to the V
dv/dt-triggered clamp imposes a maximum supply turn-on
slew rate of 10V/µs. This clamp will trigger if the supply
powers up too fast, causing amps of current to flow. Ground
and V
scheme. In applications where the dv/dt supply ramp could
exceed 10V/µs, such as hot plugging, additional methods
should be employed to ensure the rate of rise is not
exceeded.
ON1
ON2
ON1
at all times. Therefore, if V
and V
are treated as I/O pins with this protection
ON1
ON2
ON2
ON1
ON2
, V
will forward bias if V
supply and a dv/dt-triggered clamp. This
, V
ON2
ON1
ON2
needs to be turned on before V
. Recommended power supply
, V
and V
OFF
ON2
7
, then input logic signals.
OFF
ON1
be greater than or equal to
FIGURE 13. TRANSIENT RESPONSE vs LOAD CAPACITANCE
power supply pins, as
ON1
and V
0
0
T
becomes a diode
A
ON2
1800pF
= 25°C, Output load parallel RC (RL = 5kΩ, CL = 4700pF) unless otherwise specified. (Continued)
are different
V
V
50kHz 10% DUTY CYCLE
ON1
OFF
ON1
PULSE INPUT
4700pF
= -5V
& V
.
ON2
ISL24011
= 22V
400ns/DIV
Latch-up Proof
The ISL24011 is manufactured in a high voltage DI process
that isolates every transistor in its own tub making the part
latch-up proof.
Input Pin Connections
Unused inputs must be tied to ground. Failure to tie unused
input pins to ground will result in rail to rail oscillations on the
respective output pins and higher unwanted power
dissipation in the part. Under these conditions, the
temperature of the part could get very hot.
Limiting the Output Current
No output short circuit current limit exists on this part. All
applications need to limit the output current to less than
80mA. Adequate thermal heat sinking of the parts is also
required.
Application Diagram (TV)
CONTROLLER
TIMING
FIGURE 14. TYPICAL TV APPLICATION CIRCUIT
1.0µF
1.0µF
CONVERTER
V
ON1
ISL24011
SHIFTER
LEVEL
DC/DC
V
ON2
V
OFF
LCD PANEL
1.0µF
March 28, 2006
FN6196.2