M24LR64E-RDW6T/2 STMicroelectronics, M24LR64E-RDW6T/2 Datasheet - Page 19

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M24LR64E-RDW6T/2

Manufacturer Part Number
M24LR64E-RDW6T/2
Description
EEPROM 64Kbit EEProm 400kHz 13.56Mhz 1.8 to 5.5V
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24LR64E-RDW6T/2

Rohs
yes
Memory Size
64 Kbit
Organization
8192 x 8
Data Retention
40 yr
Maximum Clock Frequency
400 kHz
Maximum Operating Current
20 uA
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 90 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Access Time
900 ns
Interface Type
I2C
Minimum Operating Temperature
0 C
Operating Current
20 uA
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.8 V
M24LR64E-R
3
User memory organization
The M24LR64E-R is divided into 16 sectors of 32 blocks of 32 bits, as shown in
Figure 6
and/or write-protected using a specific password command. Read and write operations are
possible if the addressed data is not in a protected sector.
The M24LR64E-R also has a 64-bit block that is used to store the 64-bit unique identifier
(UID). The UID is compliant with the ISO 15963 description, and its value is used during the
anticollision sequence (Inventory). This block is not accessible by the user and its value is
written by ST on the production line.
The M24LR64E-R includes an AFI register that stores the application family identifier, and a
DSFID register that stores the data storage family identifier used in the anticollision
algorithm.
The M24LR64E-R has four 32-bit blocks that store an I
codes.
Figure 5.
AC0
AC1
shows the memory sector organization. Each sector can be individually read-
Circuit diagram
RF V
RF
CC
Doc ID 022712 Rev 3
Power management
Logic
EEPROM
Latch
2
C password plus three RF password
Contact V
User memory organization
I
2
C
CC
Vout
RF WIP/BUSY
SCL
SDA
V
V
CC
SS
Table
MS19780V1
19/140
5.

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