M24LR64E-RDW6T/2 STMicroelectronics, M24LR64E-RDW6T/2 Datasheet - Page 40

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M24LR64E-RDW6T/2

Manufacturer Part Number
M24LR64E-RDW6T/2
Description
EEPROM 64Kbit EEProm 400kHz 13.56Mhz 1.8 to 5.5V
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24LR64E-RDW6T/2

Rohs
yes
Memory Size
64 Kbit
Organization
8192 x 8
Data Retention
40 yr
Maximum Clock Frequency
400 kHz
Maximum Operating Current
20 uA
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 90 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Access Time
900 ns
Interface Type
I2C
Minimum Operating Temperature
0 C
Operating Current
20 uA
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.8 V
I
5.16.2
Figure 13. I
40/140
2
C device operation
Device select code = 1010 1 1 1
Ack generated during 9
Device select
Validation
code 07h
code
I
The I
password system area. This command is used in I
value. It cannot be used to update any of the RF passwords. After the write cycle, the new
I
after issuing a valid I
On delivery, the I
Following a Start condition, the bus master sends a device select code with the Read/Write
bit (RW) reset to 0 and the Chip Enable bit E2 at 1. The device acknowledges this, as shown
in
responds to each address byte with an acknowledge bit, and then waits for the four
password data bytes, the validation code, 07h, and a resend of the four password data
bytes. The most significant byte of the password is sent first, followed by the least significant
bytes.
It is necessary to send twice the 32-bit password to prevent any data corruption during the
write sequence. If the two 32-bit passwords sent are not exactly the same, the M24LR64E-R
does not modify the I
When the bus master generates a Stop condition immediately after the Ack bit (during the
tenth bit time slot), the internal write cycle is triggered. A Stop condition at any other time
does not trigger the internal write cycle.
During the internal write cycle, the serial data (SDA) signal is disabled internally, and the
device does not respond to any requests.
2
2
2
C password value is automatically activated. The I
C write password command
C write password command description
Figure
R/W
Ack
2
C write password command is used to write a 32-bit block into the M24LR64E-R I
Ack
New password
13, and waits for the two I
address 09h
[31:24]
Password
th
bit time slot.
2
Ack
C default password value is set to 0000 0000h and is activated.
Ack
New password
2
2
C present password command.
C password value.
address 00h
[23:16]
Password
Doc ID 022712 Rev 3
Ack
Ack
New password
New password
2
C password address bytes, 09h and 00h. The device
[15:8]
[31:24]
Ack
Ack
New password
New password
[7:0]
2
[23:16]
C mode to update the I
2
C password value can only be modified
Ack
Ack
New password
[15:8]
Ack
New password
2
C password
[7:0]
M24LR64E-R
ai15126b
Ack
2
C

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