ST72C334J2B6 STMicroelectronics, ST72C334J2B6 Datasheet - Page 46

• Manufacturer Part Number: ST72C334J2B6
• Description: 8-bit Microcontrollers - MCU Flash 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72C334J2B6

• Product Category: 8-bit Microcontrollers - MCU
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.2 V to 5.5 V
• Package / Case: SDIP-42
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Data Rom Size: 256 B
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Program Memory Type: Flash
• Factory Pack Quantity: 13
• Supply Voltage - Max: 5 V
• Supply Voltage - Min: 3.2 V

ST72334J/N, ST72314J/N, ST72124J
13 MISCELLANEOUS REGISTERS
The miscellaneous registers allow control over
several different features such as the external in-
terrupts or the I/O alternate functions.
13.1 I/O PORT INTERRUPT SENSITIVITY
The external interrupt sensitivity is controlled by
the ISxx bits of the MISCR1 miscellaneous regis-
ter. This control allows to have two fully independ-
ent external interrupt source sensitivities.
Each external interrupt source can be generated
on four different events on the pin:
To guarantee correct functionality, the sensitivity
bits in the MISCR1 register must be modified only
when the I bit of the CC register is set to 1 (inter-
rupt masked). See I/O port register and Miscella-
neous register descriptions for more details on the
programming.
13.2 I/O PORT ALTERNATE FUNCTIONS
The MISCR registers manage four I/O port miscel-
laneous alternate functions:
These functions are described in detail in the
tion 13 "MISCELLANEOUS REGISTERS" on
page
46/153
– SS pin internal control to use the PC7 I/O port
Falling edge
Rising edge
Falling and rising edge
Falling edge and low level
Main clock signal (f
A beep signal output on PF1 (with 3 selectable
audio frequencies)
SPI pin configuration:
function while the SPI is active.
46.
CPU
) output on PF0
Sec-
Figure 28. Ext. Interrupt Sensitivity
PB0
PB3
PB1
PB2
PB4
PB7
PA0
PA3
PB5
PB6
PA1
PA2
PF0
PF1
PF2
INTERRUPT
INTERRUPT
SOURCE
SOURCE
ei2
ei3
ei0
ei1
SENSITIVITY
SENSITIVITY
IS10
IS20
CONTROL
CONTROL
MISCR1
MISCR1
IS11
IS21