IS41LV16100B-60TLI ISSI, Integrated Silicon Solution Inc, IS41LV16100B-60TLI Datasheet - Page 3

• Manufacturer Part Number: IS41LV16100B-60TLI
• Description: IC DRAM 16MBIT 60NS 44TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: EDOr

Specifications of IS41LV16100B-60TLI

• Format - Memory: RAM
• Memory Type: DRAM - EDO
• Memory Size: 16M (1M x 16)
• Speed: 60ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TSOP II
• Organization: 1Mx16
• Density: 16Mb
• Address Bus: 10b
• Access Time (max): 60ns
• Maximum Clock Rate: Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 170mA
• Pin Count: 44
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS41LV16100B
TRUTH TABLE
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active).
2. These READ cycles may also be BYTE READ cycles (either LCAS or UCAS active).
3. EARLY WRITE only.
4. At least one of the two CAS signals must be active (LCAS or UCAS).
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
12/11/06
Function
Standby
Read: Word
Read: Lower Byte
Read: Upper Byte
Write: Word (Early Write)
Write: Lower Byte (Early Write)
Write: Upper Byte (Early Write)
Read-Write
EDO Page-Mode Read
EDO Page-Mode Write
EDO Page-Mode
Read-Write
Hidden Refresh
RAS-Only Refresh
CBR Refresh
(1,2)
(4)
(1,2)
(1)
(2)
2nd Cycle:
Any Cycle:
2nd Cycle:
2nd Cycle:
1st Cycle:
1st Cycle:
1st Cycle:
Write
Read
(1,3)
(2)
L→H→L
L→H→L
RAS
RAS
RAS
RAS
RAS
H→L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
LCAS
LCAS
LCAS
LCAS
LCAS UCAS
H→L
H→L
L→H
H→L
H→L
H→L
H→L
H
H
H
H
L
L
L
L
L
L
L
L
UCAS
UCAS
UCAS
1-800-379-4774
UCAS
H→L
H→L
L→H
H→L
H→L
H→L
H→L
H
H
H
H
L
L
L
L
L
L
L
L
H→L
H→L
H→L
W E
W E
W E
W E
W E
X
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L→H
L→H
L→H
OE
OE
OE
OE
OE
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
Address t
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/NA
NA/COL
NA/COL
NA/COL
NA/NA
X
X
R
/t
C
I/O
D
Lower Byte, D
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
D
Lower Byte, D
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
D
D
D
D
D
D
D
D
D
D
High-Z
High-Z
High-Z
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
ISSI
, D
, D
, D
IN
IN
IN
OUT
OUT
IN
IN
®
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