ISL9208IRZ-T Intersil, ISL9208IRZ-T Datasheet - Page 24

• Manufacturer Part Number: ISL9208IRZ-T
• Description: IC MULTI-CELL LI-ION PROT 32-QFN
• Manufacturer: Intersil

Specifications of ISL9208IRZ-T

• Function: Battery Monitor
• Battery Type: Lithium-Ion (Li-Ion)
• Voltage - Supply: 5 V ~ 10 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Protection
The Discharge Set, Charge Set, and Feature Set
configuration registers are write protected on initial power
up. In order to write to these registers it is necessary to set a
bit to enable each one. These write enable bits are in the
Write Enable register (Address 08H).
Write the FSETEN bit (Addr 8:bit 7) to “1” to enable changes
to the data in the Feature Set register (Address 7).
Write the CHSETEN bit (Addr 8:bit 6) to “1” to enable
changes to the data in the Feature Set register (Address 6).
CFET, DFET, CELL BALANCING OUTPUTS
CELL BALANCE OUTPUTS TO TURN OFF.
ARE ACTIVE (DEFAULT). OVERCURRENT
LOGIC AND REGISTERS ARE POWERED
TEMPERATURE PROTECTION CIRCUITS
CONDITIONS FORCE POWER FETS AND
ARE ALL OFF. (REQUIRE AN EXTERNAL
MONITORING CIRCUITS ARE AWAITING
CONDITIONS FORCE POWER FETS TO
CHARGE AND DISCHARGE CURRENT
TURN OFF. OVER-TEMPERATURE
VOLTAGE AND TEMPERATURE
VOLTAGE REGULATOR IS ON
PROTECTION CIRCUITS AND
MAIN OPERATING STATE
COMMAND TO TURN ON)
EXTERNAL CONTROL.
BY RGO
POWER FAILS AND ONE OR MORE OF THE SUPPLIES, VCC, V
24
AND V
CELL3
FIGURE 14. DEVICE OPERATION STATE MACHINE
DISABLED. ALL REGISTERS SET TO DEFAULT
DO NOT MEET MINIMUM VOLTAGE REQUIREMENTS
I
I
2
2
C INTERFACE IS ENABLED. BIASING IS
C INTERFACE IS DISABLED. BIASING IS
ENABLED. VOLTAGE REGULATOR IS
WKUP goes above or below
threshold (edge triggered).
Or, SLEEP bit is set to ‘0’
SLEEP bit is set to ‘1’
POWER DOWN STATE
POWER UP STATE
VALUES (ALL “0”)
ISL9208
ENABLED.
Power is applied and all of the supplies, VCC, V
Write the DISSETEN bit (Addr 8:bit 5) to “1” to enable
changes to the data in the Feature Set register (Address 5).
The microcontroller can reset these bits back to zero to
prevent inadvertent writes that change the operation of the
pack.
Operation State Machine
Figure 14 shows a device state machine which defines how
the ISL9208 responds to various conditions.
and V
CELL3
OPERATE WITH THE EXTERNAL DEVICE.)
CFET, DFET, CELL BALANCING OUTPUTS
meet minimum voltage requirements
LOGIC AND REGISTERS ARE POWERED
VCELL1 VOLTAGE IS HIGH ENOUGH TO
CHARGE AND DISCHARGE CURRENT
I
2
MONITORING CIRCUITS ARE OFF.
PROTECTION CIRCUITS ALL OFF.
C COMMUNICATION IS ACTIVE (IF
CELL1
VOLTAGE AND TEMPERATURE
VOLTAGE REGULATOR IS OFF
, V
BIASING IS OFF
SLEEP STATE
ARE ALL OFF.
CELL2
BY V
CELL1
,
CELL1
, V
CELL2
November 2, 2007
,
FN6446.1