PCA9634PW,112 NXP Semiconductors, PCA9634PW,112 Datasheet

IC LED DRIVER RGBA 20-TSSOP

PCA9634PW,112

Manufacturer Part Number
PCA9634PW,112
Description
IC LED DRIVER RGBA 20-TSSOP
Manufacturer
NXP Semiconductors
Type
RGBA LED Driverr
Datasheet

Specifications of PCA9634PW,112

Package / Case
20-TSSOP
Topology
Open Drain, PWM
Number Of Outputs
8
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
RGBA
Frequency
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Voltage - Output
5.5V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Low Level Output Current
25 mA
High Level Output Current
50 uA
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Supply Current
10 mA
Maximum Power Dissipation
400 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Efficiency
-
Lead Free Status / Rohs Status
 Details
Other names
935282233112
PCA9634PW
PCA9634PW
1. General description
The PCA9634 is an I
Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own
8-bit resolution (256 steps) fixed frequency Individual PWM controller that operates at
97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the LED to be set
to a specific brightness value. An additional 8-bit resolution (256 steps) Group PWM
controller has both a fixed frequency of 190 Hz and an adjustable frequency between
24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 % to 99.6 %
that is used to either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its Individual PWM controller
value or at both Individual and Group PWM controller values. The LED output driver is
programmed to be either open-drain with a 25 mA current sink capability at 5 V or
totem-pole with a 25 mA sink, 10 mA source capability at 5 V. The PCA9634 operates with
a supply voltage range of 2.3 V to 5.5 V and the outputs are 5.5 V tolerant. LEDs can be
directly connected to the LED output (up to 25 mA, 5.5 V) or controlled with external
drivers and a minimum amount of discrete components for larger current or higher voltage
LEDs.
The PCA9634 is one of the first LED controller devices in a new Fast-mode Plus (Fm+)
family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus
operation (up to 4000 pF).
The active LOW Output Enable input pin (OE) allows asynchronous control of the LED
outputs and can be used to set all the outputs to a defined I
state. The OE can also be used to externally PWM the outputs, which is useful when
multiple devices need to be dimmed or blinked together using software control.
Software programmable LED Group and three Sub Call I
defined groups of PCA9634 devices to respond to a common I
for example, all red LEDs to be turned on or off at the same time or marquee chasing
effect, thus minimizing I
126 devices on the same bus.
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9634
through the I
their default state causing the outputs to be set HIGH (LED off). This allows an easy and
quick way to reconfigure all device registers to the same condition.
PCA9634
8-bit Fm+ I
Rev. 06 — 12 September 2008
2
C-bus, identical to the Power-On Reset (POR) that initializes the registers to
2
C-bus LED driver
2
C-bus controlled 8-bit LED driver optimized for
2
C-bus commands. Seven hardware address pins allow up to
2
C-bus addresses allow all or
2
C-bus programmable logic
2
C-bus address, allowing
Product data sheet

Related parts for PCA9634PW,112

PCA9634PW,112 Summary of contents

Page 1

PCA9634 8-bit Fm+ I Rev. 06 — 12 September 2008 1. General description The PCA9634 Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own 8-bit resolution (256 steps) fixed frequency Individual PWM controller that operates ...

Page 2

... NXP Semiconductors 2. Features I 8 LED drivers. Each output programmable at: N Off Programmable LED brightness N Programmable group dimming/blinking mixed with individual LED brightness I 1 MHz Fast-mode Plus compatible I on SDA output for driving high capacitive buses I 256-step (8-bit) linear programmable brightness per LED output varying from fully off ...

Page 3

... NXP Semiconductors 3. Applications I RGB or RGBA LED drivers I LED status information I LED displays I LCD backlights I Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside mark PCA9634D PCA9634D SO20 PCA9634PW PCA9634 PCA9634BS 9634 PCA9634_6 Product data sheet ...

Page 4

... NXP Semiconductors 5. Block diagram PCA9634 SCL INPUT FILTER SDA POWER- RESET V SS REGISTER X BRIGHTNESS CONTROL 24.3 kHz 97 kHz 25 MHz OSCILLATOR OE Remark: Only one LED output shown for clarity. Fig 1. Block diagram of PCA9634 PCA9634_6 Product data sheet C-BUS CONTROL PWM GRPFREQ REGISTER 190 Hz Rev. 06 — ...

Page 5

... NXP Semiconductors 6. Pinning information 6.1 Pinning LED0 LED1 LED2 LED3 V Fig 2. Fig 4. PCA9634_6 Product data sheet SDA SCL PCA9634D LED7 8 13 LED6 9 12 LED5 10 11 LED4 SS 002aac131 Pin configuration for SO20 terminal 1 index area LED0 4 LED1 5 Transparent top view Pin configuration for HVQFN20 Rev. 06 — ...

Page 6

... NXP Semiconductors 6.2 Pin description Table 2. Symbol LED0 LED1 LED2 LED3 V SS LED4 LED5 LED6 LED7 SCL SDA V DD [1] HVQFN20 package die supply ground is connected to both the and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...

Page 7

... NXP Semiconductors 7. Functional description Refer to 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware address pins. Two of these addresses, Software Reset and LED All Call, cannot be used because their default power-up state is ON, leaving a maximum of 126 addresses ...

Page 8

... NXP Semiconductors 7.1.2 LED All Call I • Default power-up value (ALLCALLADR register): E0h or 1110 000X • Programmable through I • At power-up, LED All Call I E0h (R E1h (R sent by the master. See Section 7.3.8 “ALLCALLADR: LED All Call I Remark: The default LED All Call I ...

Page 9

... NXP Semiconductors 7.2 Control register Following the successful acknowledgement of the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCA9634, which will be stored in the Control register. The lowest 5 bits are used as a pointer to determine which register will be accessed (D[4:0]). The highest 3 bits are used as Auto-Increment fl ...

Page 10

... NXP Semiconductors AI[2:0] = 110 is used when the LED drivers must be globally programmed with different settings during the same I blinking change. AI[2:0] = 111 is used when individual and global changes must be performed during the 2 same I same time. Only the 5 least significant bits D[4:0] are affected by the AI[2:0] bits. ...

Page 11

... NXP Semiconductors 7.3.1 Mode register 1, MODE1 Table 5. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access 7 AI2 read only 6 AI1 read only 5 AI0 read only 4 SLEEP R/W 3 SUB1 R/W 2 SUB2 R/W 1 SUB3 R/W 0 ALLCALL R/W [1] It takes 500 s max. for the oscillator and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 s window ...

Page 12

... NXP Semiconductors Table 6. MODE2 - Mode register 2 (address 01h) bit description Legend: * default value. Bit Symbol Access [ OUTNE[1:0] R/W [1] See Section 7.7 “Using the PCA9634 with and without external drivers” mode. Some newer LEDs include integrated Zener diodes to limit voltage transients, reduce EMI and protect the LEDs, and these must be driven only in the open-drain mode to prevent overheating the IC ...

Page 13

... NXP Semiconductors 7.3.4 GRPPWM: Group duty cycle control Table 8. Legend: * default value. Address 0Ah When DMBLNK bit (MODE2 register) is programmed with 0, a 190 Hz fixed frequency signal is superimposed with the 97 kHz individual brightness control signal. GRPPWM is then used as a global brightness control allowing the LED outputs to be dimmed with the same value. The value in GRPFREQ is then a ‘ ...

Page 14

... NXP Semiconductors 7.3.6 LEDOUT0 and LEDOUT1: LED driver output state Table 10. Legend: * default value. Address 0Ch 0Dh LDRx = 00 — LED driver x is off (default power-up state). LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking not controlled). LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx register. LDRx = 11 — ...

Page 15

... NXP Semiconductors 7.3.8 ALLCALLADR: LED All Call I Table 12. Legend: * default value. Address 11h The LED All Call I at the same time (ALLCALL bit in register MODE1 must be equal to 1 (power-up default state)). This address is programmable through the C-bus read or write sequence. The register address can also be programmed as a Sub Call ...

Page 16

... NXP Semiconductors 7.5 Power-on reset When power is applied to V condition until V PCA9634 registers and I zeroes) causing all the channels to be deselected. Thereafter reset the device. 7.6 Software Reset The Software Reset Call (SWRST Call) allows all the devices in the I the power-up state value through a specific formatted I correctly, it implies that the I bus ...

Page 17

... NXP Semiconductors 7.7 Using the PCA9634 with and without external drivers The PCA9634 LED output drivers are 5.5 V only tolerant and can sink the device needs to drive LEDs to a higher voltage and/or higher current, use of an external driver is required. • INVRT bit (MODE2 register) can be used to keep the LED PWM control firmware the ...

Page 18

... NXP Semiconductors Table 15. Output transistors based on LEDOUT registers, INVRT and OUTDRV bits when When LED output state is controlled only by OUTNE[1:0] bits (MODE2 register). LEDOUT INVRT OUTDRV LED driver off LED driver Individual brightness 0 1 control Individual + Group dimming/blinking [1] External pull-up or LED current limiting resistor connects LEDn to V ...

Page 19

... NXP Semiconductors 7.8 Individual brightness control with group dimming/blinking A 97 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is used to control individually the brightness for each LED. On top of this signal, one of the following signals can be superimposed (this signal can be applied to the 4 LED outputs): • ...

Page 20

... NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 21

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 11. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 22

... NXP Semiconductors 9. Bus transactions slave address START condition (1) See Table 4 for register definition. Fig 13. Write to a specific register slave address START condition R/W acknowledge from slave SUBADR3 register (cont.) A acknowledge from slave Fig 14. Write to all registers using the Auto-Increment feature ...

Page 23

... NXP Semiconductors slave address START condition R/W acknowledge from slave data from MODE2 register (cont.) A acknowledge from master data from last read byte (cont not acknowledge STOP from master condition Fig 16. Read all registers using the Auto-Increment feature slave address sequence (A) ...

Page 24

... NXP Semiconductors 10. Application design-in information V = 2 C-BUS/SMBus MASTER SDA SCL C-bus address = 0010 101X. All of the 8 LEDn outputs configurable as either open-drain or totem pole. Mixing of configurations is not possible. (1) OE requires pull-up resistor if control signal from the master is open-drain. Fig 18. Typical application Question 1: What kind of edge rate control is there on the outputs? • ...

Page 25

... NXP Semiconductors Question 3: Can I really sink 400 mA through the single ground pin on the package and will this cause any ground bounce problem due to the PWM of the LEDs? • Yes, you can sink 400 mA through a single ground pin on the package. Although the package only has one ground pin, there are two ground pads on the die itself connected to this one pin ...

Page 26

... NXP Semiconductors 12. Static characteristics Table 17. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...

Page 27

... NXP Semiconductors Table 17. Static characteristics Symbol Parameter Address inputs V LOW-level input voltage IL V HIGH-level input voltage IH I input leakage current LI C input capacitance i [1] V must be lowered to 0 order to reset part. DD [2] Each bit must be limited to a maximum and the total package limited to 200 mA due to internal busing limits. ...

Page 28

... NXP Semiconductors [5] The maximum t for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (t f 250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified t ...

Page 29

... NXP Semiconductors 14. Test information Fig 21. Test circuitry for switching times PCA9634_6 Product data sheet V I PULSE GENERATOR R = Load resistor for LEDn. R for SDA and SCL > less current Load capacitance includes jig and probe capacitance Termination resistance should be equal to the output impedance Z T Rev. 06 — ...

Page 30

... NXP Semiconductors 15. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 31

... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 32

... NXP Semiconductors HVQFN20: plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 0.85 mm terminal 1 index area terminal 1 20 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 33

... NXP Semiconductors 16. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 17. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...

Page 34

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 17.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 35

... NXP Semiconductors Fig 25. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 18. Abbreviations Table 21. Acronym CDM DUT EMI ESD HBM 2 I C-bus IC LCD LED LSB MM MSB ...

Page 36

... NXP Semiconductors 19. Revision history Table 22. Revision history Document ID Release date PCA9634_6 20080912 • Modifications: Section 2 • Section 6.2 “Pin table (Table • Section 7.1.1 “Regular I – “Remark” re-written – added (new) 1 • Table 4 “Register • Table 6 “MODE2 - Mode register 2 (address 01h) bit from “ ...

Page 37

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 38

... NXP Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . . 7 7.1 Device addresses . . . . . . . . . . . . . . . . . . . . . . . 7 2 7.1.1 Regular I C-bus slave address . . . . . . . . . . . . . 7 2 7.1.2 LED All Call I C-bus address . . . . . . . . . . . . . . ...

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