PCA9625D/S911,518 NXP Semiconductors, PCA9625D/S911,518 Datasheet - Page 12

• Manufacturer Part Number: PCA9625D/S911,518
• Description: IC LED DRIVER RGBA 32-SOIC
• Manufacturer: NXP Semiconductors
• Type: RGBA LED Driverr

Specifications of PCA9625D/S911,518

• Topology: Open Drain, PWM
• Number Of Outputs: 16
• Internal Driver: Yes
• Type - Primary: Backlight, LED Blinker
• Type - Secondary: RGBA
• Frequency: 1MHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Voltage - Output: 24V
• Mounting Type: Surface Mount
• Package / Case: 32-SOIC (7.5mm Width)
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 100mA
• Internal Switch(s): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Efficiency: -
• Other names: 935285147518; PCA9625D/S911-T; PCA9625D/S911-T

NXP Semiconductors
PCA9625_2
Product data sheet
7.3.4 GRPPWM, group duty cycle control
7.3.5 GRPFREQ, group frequency
A 97 kHz fixed frequency signal is used for each output. Duty cycle is controlled through
256 linear steps from 00h (0 % duty cycle = LED output off) to FFh
(99.6 % duty cycle = LED output at maximum brightness). Applicable to LED outputs
programmed with LDRx = 10 or 11 (LEDOUT0 to LEDOUT3 registers).
Table 8.
Legend: * default value
When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz fixed
frequency signal is superimposed with the 97 kHz individual brightness control signal.
GRPPWM is then used as a global brightness control allowing the LED outputs to be
dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.
General brightness for the 16 outputs is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers
define a global blinking pattern, where GRPFREQ contains the blinking period (from
24 Hz to 10.73 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
Table 9.
Legend: * default value.
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
Blinking period is controlled through 256 linear steps from 00h (41 ms, frequency 24 Hz)
to FFh (10.73 s).
duty cycle
duty cycle
global blinking period
Address
12h
Address
13h
GRPPWM - Group brightness control register (address 12h) bit description
Register
GRPPWM
GRPFREQ - Group Frequency register (address 13h) bit description
Register
GRPFREQ
=
=
-------------------------- -
GDC 7:0
-------------------------- -
IDCx 7:0
256
256
Rev. 02 — 15 January 2008
Bit
7:0
Bit
7:0
=
GFRQ 7:0
--------------------------------------- - s
Symbol
GDC[7:0]
Symbol
GFRQ[7:0]
24
+
1
Access Value
R/W
Access Value
R/W
16-bit Fm+ I
1111 1111
0000 0000* GRPFREQ register
2
C-bus 100 mA 24 V LED driver
Description
GRPPWM register
Description
PCA9625
© NXP B.V. 2008. All rights reserved.
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